component
TPS54060ADGQR
Public Unreviewedby Ray
Texas Instruments DC-DC Converters, SSOP-10. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS54060ADGQR
Texas Instruments · DC-DC Converters · SSOP-10
TPS54060ADGQR from Texas Instruments, in a SSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOT | passive | High-side gate-drive bootstrap capacitor node. A bootstrap capacitor is required between BOOT and PH; if the voltage on this capacitor is below the minimum required, the output is forced to switch off until the capacitor is refreshed. Abs max BOOT-PH = 8 V. |
| 2 | VIN | power_in | Input supply voltage, 3.5 V to 60 V. Bypass to GND with a low-ESR ceramic capacitor placed as close to the pin as possible. |
| 3 | EN | input | Enable pin with internal pull-up current source. Pull below 1.2 V to disable; float to enable. Adjust the input undervoltage lockout with two resistors. Enable threshold typ 1.25 V. |
| 4 | SS/TR | input | Slow-start and Tracking. An external capacitor connected to this pin sets the output rise time. Since the voltage on this pin overrides the internal reference, it can be used for tracking and sequencing. |
| 5 | RT/CLK | bidirectional | Resistor Timing and External Clock. An internal amplifier holds this pin at a fixed voltage when using an external resistor to ground to set the switching frequency (100 kHz to 2.5 MHz). If pulled above the PLL upper threshold, the pin becomes a synchronization clock input to the internal PLL. If clocking edges stop, the amplifier is re-enabled and the mode returns to the resistor-set function. |
| 6 | PWRGD | output | Open-drain power-good output. Asserts low if output voltage is low due to thermal shutdown, dropout, over-voltage, or EN shutdown. Signal indicates output is within 94% to 107% of nominal. |
| 7 | VSENSE | input | Inverting node of the transconductance (gm) error amplifier. Connect the output feedback divider to this pin; regulated to the 0.8-V internal reference. |
| 8 | COMP | output | Error amplifier output and input to the output switch current comparator. Connect external loop-compensation components (typically R+C series to GND) to this pin. |
| 9 | GND | power_in | Device ground return. Must be tied to the thermal pad on the PCB for proper operation. |
| 10 | PH | power_out | Switch node - source of the internal high-side power MOSFET. Connect to the output inductor and the low side of the bootstrap capacitor. Abs max -0.6 V to 65 V (transient -2 V). |
| 11 | THERMAL PAD | power_in | Exposed thermal pad. Must be electrically connected to GND on the PCB and to a copper heatsink area for proper thermal and electrical operation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SSOP-10 |
| Category | PMIC |
| Pins | 11 |
Ordering variants
Same part, different packaging or reel option.
TPS54060ADGQRTPS54060ADGQRDRCTPS54060ADGQRDRCRTPS54060ADGQRDRCT
CAD (KiCad official)
- Symbol:
TPS54060ADGQR - Footprint:
Package_SO:SSOP-10_3.9x4.9mm_P1.00mm - 3D model: SSOP-10 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (54 pp, sha256
72d55cbcb0977dab, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).