component
TPS25830AQCWRHBRQ1
Public Unreviewedby Ray
Texas Instruments USB Converters, VQFN-32(5x5). Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS25830AQCWRHBRQ1
Texas Instruments · USB Converters · VQFN-32(5x5)
TPS25830AQCWRHBRQ1 from Texas Instruments, in a VQFN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Input Supply to regulator (4.5V to 36V). Connect a high-quality bypass capacitor directly to this pin and PGND. Tied to pins 2 and 3. |
| 2 | IN | power_in | Input Supply to regulator (4.5V to 36V). Tied to pins 1 and 3. |
| 3 | IN | power_in | Input Supply to regulator (4.5V to 36V). Tied to pins 1 and 2. |
| 4 | EN/UVLO | input | Enable pin. Do not float. High = on, Low = off. Can be tied to VIN. Precision enable input allows adjustable UVLO by external resistor divider. |
| 5 | CTRL1 | input | Logic-level control input for device/system configuration (see Truth Table). |
| 6 | CTRL2 | input | Logic-level control input for device/system configuration (see Truth Table). |
| 7 | DP_OUT | bidirectional | DP data line. Connect to USB host controller. |
| 8 | DM_OUT | bidirectional | DM data line. Connect to USB host controller. |
| 9 | RT/SYNC | bidirectional | Resistor Timing or External Clock input. Internal amplifier holds the terminal at a fixed voltage when using an external resistor to ground to set the switching frequency (300 kHz to 2.2 MHz). Pulling above the PLL upper threshold switches the pin to a high-impedance clock synchronization input. |
| 10 | LS_GD | output | External NMOS gate driver. |
| 11 | IMON | input | External resistor used to set the max cable comp voltage at full load current. |
| 12 | ILIMIT | input | External resistor used to set the current-limit threshold (see Table 10-2). |
| 13 | CSN/OUT | input | Negative input of current sense amplifier, also buck output for internal voltage regulation. |
| 14 | CSP | input | Positive input of current sense amplifier. |
| 15 | BUS | input | VBUS discharge input. Connect to VBUS on USB Connector. |
| 16 | AGND | power_in | Analog ground terminal. Ground reference for internal references and logic. All electrical parameters are measured with respect to this pin. Connect to system ground on PCB. |
| 17 | DM_IN | bidirectional | DM data line. Connect to USB connector. |
| 18 | DP_IN | bidirectional | DP data line. Connect to USB connector. |
| 19 | CC2 | bidirectional | Analog input/output. Connect to Type-C CC2 pin. |
| 20 | CC1 | bidirectional | Analog input/output. Connect to Type-C CC1 pin. |
| 21 | VCC | power_out | Output of internal bias supply. Used as supply to internal control circuits. Connect a high quality 2.2-uF capacitor from this pin to GND. |
| 22 | POL | output | Active LOW open-drain output. Signals which Type-C CC pin is connected to the CC line for cable orientation used to mux super-speed lines. Asserted when CC2 is connected to the CC line in the cable. |
| 23 | LD_DET | output | Active LOW open-drain output. Asserted when a Type-C UFP is identified on the CC lines. |
| 24 | FAULT | output | Active LOW open-drain output. Asserted during fault conditions (see Table 10-4). |
| 25 | PGND | power_in | Power ground terminal. Connect to system ground and AGND. Connect to bypass capacitor with short wide traces. |
| 26 | PGND | power_in | Power ground terminal. Connect to system ground and AGND. |
| 27 | PGND | power_in | Power ground terminal. Connect to system ground and AGND. |
| 28 | SW | power_out | Switching output of the regulator. Internally connected to source of the HS FET and drain of the LS FET. Connect to power inductor. |
| 29 | SW | power_out | Switching output of the regulator. Connect to power inductor. |
| 30 | SW | power_out | Switching output of the regulator. Connect to power inductor. |
| 31 | SW | power_out | Switching output of the regulator. Connect to power inductor. |
| 32 | BOOT | passive | Boot-strap capacitor connection for HS FET driver. Connect a high-quality 100-nF capacitor from this pin to the SW pin. |
| 33 | Thermal Pad | power_in | Exposed thermal pad. Electrically connected to PGND. Solder to a large ground copper area on the PCB for thermal dissipation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-32(5x5) |
| Category | Interface |
| Pins | 33 |
Ordering variants
Same part, different packaging or reel option.
TPS25830AQCWRHBRQ1TPS25830AQCWRHBRQ1QWRHBRQ1
CAD (KiCad official)
- Symbol:
TPS25830AQCWRHBRQ1 - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: VQFN-32(5x5) (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (76 pp, sha256
9069fce1d6b72633, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).