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Contents

README

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TPS2391DGKR

Texas Instruments · Supervisor and Reset ICs · VSSOP-8-0.65mm

TPS2391DGKR from Texas Instruments, in a VSSOP-8-0.65mm. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 FAULT output Open-drain, active-low fault indication. Pulled low to -VIN when a fault is latched (fault timer expiration or >100 mV across sense resistor). High impedance when no fault. Max output voltage 100 V; typical driver RDS(on) 35 Ω.
2 EN input Enable input to turn on/off power to the load. Referenced to -VIN. Threshold ~1.4 V (rising); pulling high above threshold enables the GATE ramp, low disables the LCA and pulls the FET gate down.
3 FLTTIME bidirectional Fault-timeout programming pin. External capacitor to -VIN sets the fault timer period. Charged to the 4-V fault threshold during current-regulation mode to declare a fault; then discharged (fully for TPS2390 latch-off, ~1% duty for TPS2391 retry).
4 IRAMP bidirectional Inrush current slew-rate programming pin. External capacitor between IRAMP and -VIN sets the load-current ramp rate via the internal LCA reference; sourced with ~-10 µA (normal) or ~-600 nA (slow turn-on). Held low when disabled/faulted.
5 -VIN power_in Negative supply input and device reference (effectively the GND/VSS pin). Connects directly to the input supply negative rail; all pin voltages and internal circuitry are referenced to this pin.
6 ISENS input Current sense input. External low-value sense resistor between ISENS and -VIN feeds back load current. LCA regulates ISENS to a ~40-mV reference clamp (IMAX ≤ 40 mV/RSENSE); a fast >100 mV excursion trips the overload comparator and bypasses the fault timer.
7 GATE output Gate drive output for the external N-channel pass FET. Slewed by the internal LCA to control inrush; drives to ~14 V (typ VOH) to fully enhance the FET after ramp, and is pulled low rapidly during a fast overload event.
8 RTN power_in Positive supply input (return node of the -48 V input bus). Nominal -VIN-to-RTN operating range 36 V to 80 V; internal regulators derive bias from this rail. Absolute max 100 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VSSOP-8-0.65mm
Category PMIC
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • TPS2391DGKR

CAD (KiCad official)

  • Symbol: TPS2391DGKR
  • Footprint: Package_SO:VSSOP-8_2.3x2mm_P0.5mm
  • 3D model: VSSOP-8-0.65mm (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (24 pp, sha256 b85e5611df7ad276, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF