component
tps2379ddar
Public Unreviewedby Ray
Texas Instruments Ethernet Controllers, SOIC-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads when scrolled away or the tab is hidden.
README
markdownTPS2379DDAR
Texas Instruments · Ethernet Controllers · SOIC-8-EP
TPS2379DDAR from Texas Instruments, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Positive PoE input power rail (referenced to VSS). Operating range 40 V-57 V (absolute max 100 V). Bypass with 0.1 µF to VSS. |
| 2 | DEN | bidirectional | Detection / enable. Connect a 24.9 kΩ resistor from DEN to VDD to present the IEEE 802.3at signature during detection. Pulling DEN to VSS disables the internal pass MOSFET. |
| 3 | CLS | output | Classification current program pin. Connect a resistor from CLS to VSS to set the PoE classification current advertised to the PSE. Sourcing current up to 65 mA (abs max); do not apply an external voltage. |
| 4 | VSS | power_in | Negative power rail derived from the PoE source; serves as the device reference (0 V). The exposed PowerPAD must also be tied to VSS. |
| 5 | RTN | power_out | Return / drain of the internal PoE pass MOSFET. Provides the isolated return for the downstream DC-DC converter; nominal 0.85 A continuous, current limit ~1 A. Operating range 0-57 V with respect to VSS. |
| 6 | CDB | output | Open-drain DC-DC converter disable output, active-low, referenced to RTN. Holds the downstream converter off until PoE start-up completes; sink capability 2 mA (abs max 5 mA). Requires an external pull-up to a rail ≤57 V above RTN. |
| 7 | T2P | output | Open-drain Type-2 present flag, active-low, referenced to RTN. Asserts low when a Type-2 (802.3at) PSE has been detected via 2-event hardware classification; sink capability 2 mA (abs max 5 mA). Requires an external pull-up to a rail ≤57 V above RTN. |
| 8 | GATE | output | Auxiliary gate-driver output for an external N-channel pass MOSFET (Q1) used to extend continuous current beyond the internal 0.85 A hotswap FET in high-power/UPOE designs. Output swing limited to 18 V (abs max). |
| 9 | PAD | power_in | Exposed PowerPAD on the package underside. Must be electrically connected to VSS and soldered to a large copper fill for heat dissipation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8-EP |
| Category | Interface |
| Pins | 9 |
Ordering variants
TPS2379DDAR
CAD (KiCad official)
- Symbol:
TPS2379DDAR - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOIC-8-EP (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (None pp, sha256
60db50efafa87cc3, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads when scrolled away or the tab is hidden.
PCB Footprint
Open full view ↗Loads on click. Unloads when scrolled away or the tab is hidden.
Datasheet
Open in new tab ↗Loads on click. Unloads when scrolled away or the tab is hidden.