TPMP1470GJ-Z-B from TECH PUBLIC, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	GND	power_in	Ground reference for the IC. Return path for both signal and power currents; connect to a solid ground plane close to the input capacitor.
2	LX	output	Switching node. Connects internally to the drains of the high-side and low-side power MOSFETs; drive the external inductor to VOUT from this pin. Absolute rating: -0.3V to (VIN+0.5V).
3	IN	power_in	Power supply input, 4.5V to 17V (absolute max 17V). Bypass to GND with a low-ESR ceramic capacitor (e.g. 22 uF) close to the pin.
4	FB	input	Adjustable version feedback input. Connect to the center point of the external resistor divider from VOUT to GND. Regulated to 0.800V (typ); absolute max -0.3V to 6V.
5	EN	input	Enable input. Drive to a logic-high to enable the IC; drive to a logic-low (or GND) to disable the IC and enter micro-power shutdown mode (~1 uA supply current). Absolute max -0.3V to 6V.
6	BS	passive	Bootstrap. A capacitor (typ. 1 uF) connected between LX and BS provides the floating supply for the high-side MOSFET gate driver. Absolute rating: (VSW-0.3V) to (VSW+5V).

Key specifications

Parameter	Value
Manufacturer	TECH PUBLIC
Package	SOT-23-6
Category	PMIC
Pins	6

Ordering variants

Same part, different packaging or reel option.

TPMP1470GJ-Z-B

CAD (KiCad official)

Symbol: TPMP1470GJ-Z-B
Footprint: Package_TO_SOT_SMD:SOT-23-6
3D model: SOT-23-6 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: TECH PUBLIC datasheet (6 pp, sha256 ea3015144dc198cd, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF