component

TPMP1470GJ-Z-B

Public Made by Adom

by adom

TECH PUBLIC DC-DC Converters, SOT-23-6. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs tpmp1470gj-z-b: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json tpmp1470gj-z-b: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md tpmp1470gj-z-b: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
tpmp1470gj-z-b-etched.fit.json tpmp1470gj-z-b: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tpmp1470gj-z-b-etched.glb tpmp1470gj-z-b: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tpmp1470gj-z-b-etched.step tpmp1470gj-z-b: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tpmp1470gj-z-b.glb Publish 0.1.0 · Ray
tpmp1470gj-z-b.kicad_mod Publish 0.1.0 · Ray
tpmp1470gj-z-b.kicad_sym Publish 0.1.0 · Ray
tpmp1470gj-z-b.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
tpmp1470gj-z-b.step Publish 0.1.0 · Ray

TPMP1470GJ-Z-B

TECH PUBLIC · DC-DC Converters · SOT-23-6

TPMP1470GJ-Z-B from TECH PUBLIC, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground reference for the IC. Return path for both signal and power currents; connect to a solid ground plane close to the input capacitor.
2 LX output Switching node. Connects internally to the drains of the high-side and low-side power MOSFETs; drive the external inductor to VOUT from this pin. Absolute rating: -0.3V to (VIN+0.5V).
3 IN power_in Power supply input, 4.5V to 17V (absolute max 17V). Bypass to GND with a low-ESR ceramic capacitor (e.g. 22 uF) close to the pin.
4 FB input Adjustable version feedback input. Connect to the center point of the external resistor divider from VOUT to GND. Regulated to 0.800V (typ); absolute max -0.3V to 6V.
5 EN input Enable input. Drive to a logic-high to enable the IC; drive to a logic-low (or GND) to disable the IC and enter micro-power shutdown mode (~1 uA supply current). Absolute max -0.3V to 6V.
6 BS passive Bootstrap. A capacitor (typ. 1 uF) connected between LX and BS provides the floating supply for the high-side MOSFET gate driver. Absolute rating: (VSW-0.3V) to (VSW+5V).

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOT-23-6
Category PMIC
Pins 6

Ordering variants

Same part, different packaging or reel option.

  • TPMP1470GJ-Z-B

CAD (KiCad official)

  • Symbol: TPMP1470GJ-Z-B
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: tpmp1470gj-z-b-etched.step / tpmp1470gj-z-b-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tpmp1470gj-z-b.step / tpmp1470gj-z-b.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (6 pp, sha256 ea3015144dc198cd, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF