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Contents

README

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TPM3067NPS8-2

TECH PUBLIC · MOSFETs · SOP-8

TPM3067NPS8-2 from TECH PUBLIC, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of the N-channel MOSFET (FET1). Typically tied to the low-side reference in load-switch/battery-protection circuits.
2 G1 input Gate of the N-channel MOSFET (FET1). VGS(th) typ 1.67 V; absolute VGS limited to ±20 V.
3 S2 passive Source of the P-channel MOSFET (FET2). Typically tied to the positive supply in high-side load switch applications.
4 G2 input Gate of the P-channel MOSFET (FET2). VGS(th) typ -1.53 V; absolute VGS limited to ±20 V.
5 D2 passive Drain of the P-channel MOSFET (FET2). Pins 5 and 6 are internally connected. BVDSS = -30 V, ID = -6 A continuous @ TA=25°C.
6 D2 passive Drain of the P-channel MOSFET (FET2). Pins 5 and 6 are internally connected to spread thermal/current handling.
7 D1 passive Drain of the N-channel MOSFET (FET1). Pins 7 and 8 are internally connected. BVDSS = 30 V, ID = 7 A continuous @ TA=25°C.
8 D1 passive Drain of the N-channel MOSFET (FET1). Pins 7 and 8 are internally connected to spread thermal/current handling.

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOP-8
Category Transistors/Thyristors
Pins 8

CAD (KiCad official)

  • Symbol: TPM3067NPS8-2
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (None pp, sha256 5b5db6d2ae654c6b, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF