TLV75533PDBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	IN	power_in	Regulator input supply, 1.45 V to 5.5 V (abs max 6.0 V). Requires a ≥1 µF ceramic capacitor to GND (effective capacitance >0.47 µF after derating).
2	GND	power_in	Device ground return.
3	EN	input	Enable input. Drive above VHI (≥1 V) to turn the regulator on; drive below VLO (≤0.4 V) to place the LDO in shutdown, which also actively discharges VOUT. Abs max 6.0 V; do not leave floating.
4	NC	unconnected	No internal connection. May be left floating or tied to GND for board layout.
5	OUT	power_out	Regulated 3.3 V output, 500 mA capable. Requires a ≥1 µF ceramic capacitor to GND (1 µF to 200 µF range; effective >0.47 µF).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOT-23-5
Category	PMIC
Pins	5

Ordering variants

Same part, different packaging or reel option.

TLV75533PDBVR
TLV75533PDBVRDBVT
TLV75533PDBVRDQNR
TLV75533PDBVRDQNT
TLV75533PDBVRDRVR
TLV75533PDBVRDRVT

CAD (KiCad official)

Symbol: TLV75533PDBVR
Footprint: Package_TO_SOT_SMD:SOT-23-5
3D model: SOT-23-5 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (42 pp, sha256 44ac688d7e51f852, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF