component

TLV75533PDBVR

Public Made by Adom

by adom

TLV75533PDBVR with verified pin map and explicitly nominal drawing-led 3D assets.

componentpmictlv75533pdbvr
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Retain nominal model correction evidence and exact ordering metadata · John Lauer
review Retain nominal model correction evidence and exact ordering metadata · John Lauer
viewers Publish 0.1.1 · John Lauer
build_nominal_model.py Publish 0.1.1 · John Lauer
LICENSE-KICAD.md Publish 0.1.1 · John Lauer
package.json Publish 0.1.1 · John Lauer
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json Retain nominal model correction evidence and exact ordering metadata · John Lauer
provenance-correction.json Publish 0.1.1 · John Lauer
README.md Publish 0.1.1 · John Lauer
tlv75533pdbvr-ai-nominal.step Publish 0.1.1 · John Lauer
tlv75533pdbvr-etched.check.json Publish 0.1.1 · John Lauer
tlv75533pdbvr-etched.check.png Publish 0.1.1 · John Lauer
tlv75533pdbvr-etched.fit.json tlv75533pdbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
tlv75533pdbvr-etched.glb Publish 0.1.1 · John Lauer
tlv75533pdbvr-etched.mark-plan.json Publish 0.1.1 · John Lauer
tlv75533pdbvr-etched.step Publish 0.1.1 · John Lauer
tlv75533pdbvr-hero.glb Publish 0.1.1 · John Lauer
tlv75533pdbvr-hero.overlay.json Publish 0.1.1 · John Lauer
tlv75533pdbvr.glb Publish 0.1.1 · John Lauer
tlv75533pdbvr.kicad_mod Publish 0.1.0 · Ray
tlv75533pdbvr.kicad_sym Publish 0.1.0 · Ray
tlv75533pdbvr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
tlv75533pdbvr.step Publish 0.1.1 · John Lauer

TLV75533PDBVR

Texas Instruments · 5-pin SOT-23 (DBV0005A).

Pinout

Pin Name Type Function
1 IN power_in Regulator input supply, 1.45 V to 5.5 V (abs max 6.0 V). Requires a ≥1 µF ceramic capacitor to GND (effective capacitance >0.47 µF after derating).
2 GND power_in Device ground return.
3 EN input Enable input. Drive above VHI (≥1 V) to turn the regulator on; drive below VLO (≤0.4 V) to place the LDO in shutdown, which also actively discharges VOUT. Abs max 6.0 V; do not leave floating.
4 NC unconnected No internal connection. May be left floating or tied to GND for board layout.
5 OUT power_out Regulated 3.3 V output, 500 mA capable. Requires a ≥1 µF ceramic capacitor to GND (1 µF to 200 µF range; effective >0.47 µF).

CAD and provenance

The plain and marked STEP/GLB files are original Adom nominal reconstructions from TI's package drawing: 2.9 × 1.6 mm body, 2.9 mm lead span, 0.95 mm pitch and 1.20 mm height. The prior generic model was 1.55 mm tall, above TI's 1.45 mm maximum. Lead bends, mold taper and colors are illustrative; this is not manufacturer CAD or a tolerance envelope.

The marked variant adds a subtle virtual full-MPN identification layer, 0.005 mm above the package. It is neither a factory mark nor a recessed manufacturing feature. Board-use assets exclude the hero's nonphysical footprint and signal overlays.

The existing KiCad-derived symbol and footprint retain their original library terms. The footprint is a generic project-compatible variant; compare its land pattern with the manufacturer example before selecting a process. See correction and provenance, current manufacturer datasheet, and TI source.

Only exact ordering code TLV75533PDBVR is asserted here. Earlier concatenated variant strings were unsupported and have been removed.

Local model inspection and native symbol/footprint validation are separate from physical qualification and published wiki visual review.