TLV320AIC3204IRHBR
Public Unreviewedby Ray
Texas Instruments Audio Interface ICs, QFN-32-EP(5x5). Datasheet-verified pinout, KiCad symbol/footprint/3D.
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markdownTLV320AIC3204IRHBR
Texas Instruments · Audio Interface ICs · QFN-32-EP(5x5)
TLV320AIC3204IRHBR from Texas Instruments, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | MCLK | input | Master clock input. Can serve as the reference clock source or PLL input; accepts 512 kHz to 50 MHz. |
| 2 | BCLK | bidirectional | Audio serial data bus (primary) bit clock. Direction depends on master/slave configuration of the I2S port. |
| 3 | WCLK | bidirectional | Audio serial data bus (primary) word clock (LRCLK). Direction depends on master/slave configuration. |
| 4 | DIN/MFP1 | input | Multifunction pin 1. Primary: audio serial data bus data input. Secondary: digital microphone input, general-purpose clock input, or general-purpose input. |
| 5 | DOUT/MFP2 | output | Multifunction pin 2. Primary: audio serial data bus data output. Secondary: general-purpose output, clock output, INT1/INT2 output, or secondary I2S bit/word clock output. |
| 6 | IOVDD | power_in | Digital I/O voltage supply, 1.1 V to 3.6 V. |
| 7 | IOVSS | power_in | Digital I/O ground supply. |
| 8 | SCLK/MFP3 | input | Multifunction pin 3. Primary (SPI_SELECT=1): SPI serial clock. Secondary (SPI_SELECT=0): headphone-detect input, digital mic input, secondary I2S bit/word/data input, or general-purpose input. |
| 9 | SCL/SS | input | I2C serial clock when SPI_SELECT=0; SPI chip-select (active-low) when SPI_SELECT=1. |
| 10 | SDA/MOSI | input | I2C serial data input when SPI_SELECT=0; SPI serial data input (MOSI) when SPI_SELECT=1. |
| 11 | MISO/MFP4 | output | Multifunction pin 4. Primary (SPI_SELECT=1): SPI serial data output (MISO). Secondary (SPI_SELECT=0): general-purpose output, CLKOUT, INT1/INT2, primary ADC word clock output, digital mic clock output, or secondary I2S outputs. |
| 12 | SPI_SELECT | input | Control-mode select pin. 1 selects SPI mode; 0 selects I2C mode. Determines the alt-function of pins 8-11. |
| 13 | IN1_L | input | Multifunction analog input. Single-ended: MIC 1 or Line 1 left. Differential: MIC or Line right, negative. |
| 14 | IN1_R | input | Multifunction analog input. Single-ended: MIC 1 or Line 1 right. Differential: MIC or Line right, positive. |
| 15 | IN2_L | input | Multifunction analog input. Single-ended: MIC 2 or Line 2 left. Differential: MIC or Line left, positive. |
| 16 | IN2_R | input | Multifunction analog input. Single-ended: MIC 2 or Line 2 right. Differential: MIC or Line left, negative. |
| 17 | AVSS | power_in | Analog ground supply. |
| 18 | REF | output | Reference voltage output for filtering. Connect an external filter capacitor. |
| 19 | MICBIAS | output | Programmable microphone bias voltage output. |
| 20 | IN3_L | input | Multifunction analog input. Single-ended: MIC 3 or Line 3 left. Differential: MIC or Line left, positive, or MIC or Line right, negative. |
| 21 | IN3_R | input | Multifunction analog input. Single-ended: MIC 3 or Line 3 right. Differential: MIC or Line left, negative, or MIC or Line right, positive. |
| 22 | LOL | output | Left line output. |
| 23 | LOR | output | Right line output. |
| 24 | AVDD | power_in | Analog voltage supply 1.5 V - 1.95 V. Input when A-LDO disabled; filtering output when A-LDO enabled. |
| 25 | HPL | output | Left high-power output driver (headphone). |
| 26 | LDOIN/HPVDD | power_in | LDO input supply and headphone power supply, 1.9 V - 3.6 V. |
| 27 | HPR | output | Right high-power output driver (headphone). |
| 28 | DVSS | power_in | Digital ground and chip-substrate ground. |
| 29 | DVDD | power_in | Digital voltage supply 1.26 V - 1.95 V when LDO_SELECT=0 (D-LDO disabled); digital voltage supply filtering output when LDO_SELECT=1 (D-LDO enabled). |
| 30 | LDO_SELECT | input | Selects whether the internal digital LDO is used. Connect to DVSS to disable. |
| 31 | RESET | input | Reset input, active-low. |
| 32 | GPIO/MFP5 | bidirectional | Multifunction pin 5. Primary: general-purpose digital I/O. Secondary: CLKOUT, INT1/INT2, primary ADC word clock output, secondary I2S bit/word clock output, or digital microphone clock output. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | QFN-32-EP(5x5) |
| Category | Interface |
| Pins | 32 |
Ordering variants
Same part, different packaging or reel option.
TLV320AIC3204IRHBRTLV320AIC3204IRHBT
CAD (KiCad official)
- Symbol:
TLV320AIC3204IRHBR - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
tlv320aic3204irhbr.step |
346 KB | You want the bare part, or you mark your own boards. |
tlv320aic3204irhbr-etched.step |
3.6 MB | You want the part with TLV320AIC3204IRHBR already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 912 faces against 206 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (45 pp, sha256
91a58f986c5bc685, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).