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TLC6C598QPWRQ1

Texas Instruments · LED Drivers · TSSOP-16

TLC6C598QPWRQ1 from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Logic supply pin, 3 V to 5.5 V (absolute max 8 V). Add a 0.1-uF ceramic bypass capacitor close to the pin.
2 SER_IN input Serial data input. Data on SER_IN is loaded into the internal shift register on each rising edge of SRCK. VIH = 2.4 V min, VIL = 0.7 V max; setup/hold 15 ns.
3 DRAIN0 output Open-drain low-side DMOS output, bit 0 of the storage register. 40-V drain-source rating, up to 50 mA continuous sink at VCC = 5 V. Connect to LED cathode with a series resistor.
4 DRAIN1 output Open-drain low-side DMOS output, bit 1 of the storage register. 40-V, 50-mA continuous-sink LED current-sink channel; connect to LED cathode.
5 DRAIN2 output Open-drain low-side DMOS output, bit 2 of the storage register. 40-V, 50-mA continuous-sink LED current-sink channel; connect to LED cathode.
6 DRAIN3 output Open-drain low-side DMOS output, bit 3 of the storage register. 40-V, 50-mA continuous-sink LED current-sink channel; connect to LED cathode.
7 CLR input Shift-register clear, active-low. Driving CLR low clears all registers in the device; the storage register transfers data to the output buffer when CLR is high. TI recommends asserting CLR during power-up or initialization.
8 G input Output enable, active-low. When G is low, the storage-register data is transparent to the output buffers and enabled channels can sink current; when G is high, all output buffers are forced low and all drain outputs are off. Can be used as a global PWM-dimming input.
9 SER_OUT output Serial data output of the 8-bit shift register, intended to feed the SER_IN of the next device in a cascaded chain. Data is clocked out on the falling edge of SRCK to provide extra hold margin between cascaded devices.
10 RCK input Register (latch) clock. On the rising edge of RCK, the data in each shift-register stage is transferred into the storage register and becomes visible at the outputs (when G is low).
11 DRAIN4 output Open-drain low-side DMOS output, bit 4 of the storage register. 40-V, 50-mA continuous-sink LED current-sink channel; connect to LED cathode.
12 DRAIN5 output Open-drain low-side DMOS output, bit 5 of the storage register. 40-V, 50-mA continuous-sink LED current-sink channel; connect to LED cathode.
13 DRAIN6 output Open-drain low-side DMOS output, bit 6 of the storage register. 40-V, 50-mA continuous-sink LED current-sink channel; connect to LED cathode.
14 DRAIN7 output Open-drain low-side DMOS output, bit 7 of the storage register (MSB). 40-V, 50-mA continuous-sink LED current-sink channel; connect to LED cathode.
15 SRCK input Serial shift-register clock input. On each rising edge of SRCK, data transfers from SER_IN into the internal shift register; SER_OUT updates on the falling edge. Max 10 MHz (CL = 30 pF, ID = 20 mA); min high/low pulse 30 ns.
16 GND power_in Power/ground reference for the device. Connect to the board ground plane; maximize copper and use thermal vias under the package for heat dissipation.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category LED-drv
Pins 16

Ordering variants

  • TLC6C598QPWRQ1
  • TLC6C598QPWRQ1TLC6C598QDRQ1
  • TLC6C598QPWRQ1TLC6C598CQDRQ1

CAD (KiCad official)

  • Symbol: TLC6C598QPWRQ1
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (None pp, sha256 161c9db4567f72f4, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

Symbol & Footprint

Schematic Symbol

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PCB Footprint

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