component
TL084CDT
Public Made by Adomby adom
STMicroelectronics FET InputAmplifiers, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownTL084CDT
STMicroelectronics · FET InputAmplifiers · SOIC-14
TL084CDT from STMicroelectronics, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT1 | output | Output of op-amp 1. Push-pull output with short-circuit protection; output voltage swing typically +/-12 V into 2 kOhm at Vcc = +/-15 V. |
| 2 | IN1- | input | Inverting input of op-amp 1. High-impedance JFET input (~10^12 Ohm), input bias current ~20 pA typ at 25 C. |
| 3 | IN1+ | input | Non-inverting input of op-amp 1. High-impedance JFET input. Common-mode range typically +11 V to -12 V at Vcc = +/-15 V. |
| 4 | VCC+ | power_in | Positive supply rail. Operating range 6 V to 36 V total (single supply) or up to +/-18 V split supply. Absolute maximum +/-18 V. Supply current ~1.4 mA typ (no load). |
| 5 | IN2+ | input | Non-inverting input of op-amp 2. High-impedance JFET input. |
| 6 | IN2- | input | Inverting input of op-amp 2. High-impedance JFET input. |
| 7 | OUT2 | output | Output of op-amp 2. Short-circuit protected; output short-circuit current ~40 mA typ. |
| 8 | OUT3 | output | Output of op-amp 3. Short-circuit protected push-pull output. |
| 9 | IN3- | input | Inverting input of op-amp 3. High-impedance JFET input. |
| 10 | IN3+ | input | Non-inverting input of op-amp 3. High-impedance JFET input. |
| 11 | VCC- | power_in | Negative supply rail (or GND in single-supply operation). Absolute maximum -18 V relative to VCC+ midpoint. In single-supply operation, tie to GND. |
| 12 | IN4+ | input | Non-inverting input of op-amp 4. High-impedance JFET input. |
| 13 | IN4- | input | Inverting input of op-amp 4. High-impedance JFET input. |
| 14 | OUT4 | output | Output of op-amp 4. Short-circuit protected push-pull output. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOIC-14 |
| Category | Op-amp/Cmp |
| Pins | 14 |
Ordering variants
Same part, different packaging or reel option.
TL084CDTDTL084CDTTL084CDTNTL084CDTPT
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input offset voltage (Rs = 50Ω), TL084C | Vio | 3 | 10 | mV | Rs = 50Ω, Tamb = +25°C | 4 | |
| Input offset voltage (Rs = 50Ω), TL084C | Vio | 13 | mV | Rs = 50Ω, Tmin ≤ Tamb ≤ Tmax | 4 | ||
| Input offset current | Iio | 5 | 100 | pA | Tamb = +25°C | 4 | |
| Input offset current | Iio | 4 | nA | Tmin ≤ Tamb ≤ Tmax | 4 | ||
| Input bias current | Iib | 30 | 200 | pA | Tamb = +25°C | 4 | |
| Input bias current | Iib | 20 | nA | Tmin ≤ Tamb ≤ Tmax | 4 | ||
| Large signal voltage gain | Avd | 25 | 200 | V/mV | RL = 2kΩ, Vo = ±10V, Tamb = +25°C | 4 | |
| Large signal voltage gain | Avd | 15 | V/mV | RL = 2kΩ, Vo = ±10V, Tmin ≤ Tamb ≤ Tmax | 4 | ||
| Supply voltage rejection ratio | SVR | 70 | 86 | dB | RS = 50Ω, Tamb = +25°C | 4 | |
| Supply voltage rejection ratio | SVR | 70 | dB | RS = 50Ω, Tmin ≤ Tamb ≤ Tmax | 4 | ||
| Supply current, no load | ICC | 1.4 | 2.5 | mA | Tamb = +25°C | 4 | |
| Supply current, no load | ICC | 2.5 | mA | Tmin ≤ Tamb ≤ Tmax | 4 | ||
| Input common mode voltage range | Vicm | -12 | 15 | V | 4 | ||
| Common mode rejection ratio | CMR | 70 | 86 | dB | RS = 50Ω, Tamb = +25°C | 4 | |
| Common mode rejection ratio | CMR | 70 | dB | RS = 50Ω, Tmin ≤ Tamb ≤ Tmax | 4 | ||
| Output short-circuit current | Ios | 10 | 40 | 60 | mA | Tamb = +25°C | 4 |
| Output short-circuit current | Ios | 10 | 60 | mA | Tmin ≤ Tamb ≤ Tmax | 4 | |
| Output voltage swing | ±Vopp | 10 | V | Tamb = +25°C, RL = 2kΩ | 4 | ||
| Output voltage swing | ±Vopp | 12 | V | Tamb = +25°C, RL = 10kΩ | 4 | ||
| Slew rate (Tamb = +25°C) | SR | 8 | 16 | V/μs | Vin = 10V, RL = 2kΩ, CL = 100pF, unity gain | 4 | |
| Gain bandwidth product (Tamb = +25°C) | GBP | 2.5 | 4 | MHz | Vin = 10mV, RL = 2kΩ, CL = 100pF, f = 100kHz | 5 | |
| Input offset voltage drift | DVio | 10 | μV/°C | 4 | |||
| Rise time (Tamb = +25°C) | tr | 0.1 | μs | Vin = 20mV, RL = 2kΩ, CL = 100pF, unity gain | 5 | ||
| Overshoot (Tamb = +25°C) | Kov | 10 | % | Vin = 20mV, RL = 2kΩ, CL = 100pF, unity gain | 5 | ||
| Total harmonic distortion (Tamb = +25°C) | THD | 0.01 | % | f = 1kHz, RL = 2kΩ, CL = 100pF, Av = 20dB, Vo = 2Vpp | 5 | ||
| Equivalent input noise voltage | en | 15 | nV/√Hz | RS = 100Ω, f = 1kHz | 5 | ||
| Phase margin | ∅m | 45 | degrees | 5 | |||
| Channel separation | Vo1/Vo2 | 120 | dB | Av = 100 | 5 | ||
| Supply voltage | VCC | -18 | 18 | V | 3 | ||
| Input voltage | Vi | -15 | 15 | V | 3 | ||
| Differential input voltage | Vid | -30 | 30 | V | 3 | ||
| Power dissipation | Ptot | 680 | mW | 3 | |||
| Operating free-air temperature range (TL084C, AC, BC) | Toper | 0 | 70 | °C | 3 | ||
| Storage temperature range | Tstg | -65 | 150 | °C | 3 | ||
| Thermal resistance junction to ambient, SO-14 | Rthja | 105 | °C/W | SO-14 package | 3 | ||
| Thermal resistance junction to case, SO-14 | Rthjc | 31 | °C/W | SO-14 package | 3 | ||
| Supply voltage range | VCC | 6 | 36 | V | 3 | ||
| Operating free-air temperature range (TL084C, AC, BC) | Toper | 0 | 70 | °C | 3 |
CAD (KiCad official)
- Symbol:
TL084CDT - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
tl084cdt-etched.step/tl084cdt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tl084cdt.step/tl084cdt.glbare the bare package body.
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
tl084cdt.step |
195 KB | You want the bare part, or you mark your own boards. |
tl084cdt-etched.step |
1.9 MB | You want the part with TL084CDT already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 489 faces against 237 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (16 pp, sha256
a0858967ea2ea0ac, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).