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TL084CDT

Public Made by Adom

by adom

STMicroelectronics FET InputAmplifiers, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs tl084cdt: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
package.json Publish 0.2.0 · Ray 1mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 11d ago
README.md tl084cdt: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 17d ago
tl084cdt-etched.fit.json tl084cdt: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tl084cdt-etched.glb tl084cdt: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tl084cdt-etched.step tl084cdt: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tl084cdt.glb Publish 0.1.0 · Ray 1mo ago
tl084cdt.kicad_mod Publish 0.1.0 · Ray 1mo ago
tl084cdt.kicad_sym Publish 0.1.0 · Ray 1mo ago
tl084cdt.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect and oval pad as a SQUARE EAGLE smd; this carries the real pad shape across (0 -> 14 rounded pads) and stops dropping geometry drawn on KiCad User.N layers. Attributes, connects, pads and the pin-1 marker are gated against decreasing and are unchanged. · Ray 1mo ago
tl084cdt.step Publish 0.1.0 · Ray 1mo ago

TL084CDT

STMicroelectronics · FET InputAmplifiers · SOIC-14

TL084CDT from STMicroelectronics, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT1 output Output of op-amp 1. Push-pull output with short-circuit protection; output voltage swing typically +/-12 V into 2 kOhm at Vcc = +/-15 V.
2 IN1- input Inverting input of op-amp 1. High-impedance JFET input (~10^12 Ohm), input bias current ~20 pA typ at 25 C.
3 IN1+ input Non-inverting input of op-amp 1. High-impedance JFET input. Common-mode range typically +11 V to -12 V at Vcc = +/-15 V.
4 VCC+ power_in Positive supply rail. Operating range 6 V to 36 V total (single supply) or up to +/-18 V split supply. Absolute maximum +/-18 V. Supply current ~1.4 mA typ (no load).
5 IN2+ input Non-inverting input of op-amp 2. High-impedance JFET input.
6 IN2- input Inverting input of op-amp 2. High-impedance JFET input.
7 OUT2 output Output of op-amp 2. Short-circuit protected; output short-circuit current ~40 mA typ.
8 OUT3 output Output of op-amp 3. Short-circuit protected push-pull output.
9 IN3- input Inverting input of op-amp 3. High-impedance JFET input.
10 IN3+ input Non-inverting input of op-amp 3. High-impedance JFET input.
11 VCC- power_in Negative supply rail (or GND in single-supply operation). Absolute maximum -18 V relative to VCC+ midpoint. In single-supply operation, tie to GND.
12 IN4+ input Non-inverting input of op-amp 4. High-impedance JFET input.
13 IN4- input Inverting input of op-amp 4. High-impedance JFET input.
14 OUT4 output Output of op-amp 4. Short-circuit protected push-pull output.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SOIC-14
Category Op-amp/Cmp
Pins 14

Ordering variants

Same part, different packaging or reel option.

  • TL084CDTD
  • TL084CDT
  • TL084CDTN
  • TL084CDTPT

CAD (KiCad official)

  • Symbol: TL084CDT
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: tl084cdt-etched.step / tl084cdt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tl084cdt.step / tl084cdt.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
tl084cdt.step 195 KB You want the bare part, or you mark your own boards.
tl084cdt-etched.step 1.9 MB You want the part with TL084CDT already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 489 faces against 237 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (16 pp, sha256 a0858967ea2ea0ac, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF