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SY8205FCC

Silergy Corp · DC-DC Converters · SOIC-8-EP

SY8205FCC from Silergy Corp, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BS passive Boot-Strap pin. Supply for the high-side gate driver. Decouple to LX with a 0.1 µF ceramic capacitor.
2 LX power_out Switching node. Connect to the inductor of the buck converter output stage.
3 EN input Enable control input. Accurate 1.2 V rising threshold; add an RC network to the EN pin to program turn-on delay.
4 SS passive Soft-start programming pin. Connect a capacitor from this pin to GND to program soft-start time: Tss = Css × 0.6 V / 10 µA.
5 FB input Output feedback pin. Connect to the center tap of an external divider to program Vout = 0.6 V × (1 + R1/R2). Reference is 0.6 V typ.
6 VCC power_out Internal 3.3 V LDO output. Powers internal analog and driving circuitry. Add a 1 µF bypass capacitor to GND.
7 VIN power_in Power supply input (PVIN, tied with pin 8). 4.5 V-30 V input range. Decouple to GND with at least a 10 µF ceramic capacitor.
8 VIN power_in Power supply input (PVIN, tied with pin 7). 4.5 V-30 V input range. Decouple to GND with at least a 10 µF ceramic capacitor.
EP GND power_in Exposed thermal paddle. Ground return. Solder to the PCB ground plane for electrical connection and thermal dissipation (θJC ≈ 10 °C/W).

Key specifications

Parameter Value
Manufacturer Silergy Corp
Package SOIC-8-EP
Category PMIC
Pins 9

Ordering variants

Same part, different packaging or reel option.

  • SY8205FCC
  • SY8205FCCDNC

CAD (KiCad official)

  • Symbol: SY8205FCC
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.514x3.2mm
  • 3D model: SOIC-8-EP (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
sy8205fcc.step 193 KB You want the bare part, or you mark your own boards.
sy8205fcc-etched.step 1.9 MB You want the part with SY8205FCC already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 460 faces against 63 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Silergy Corp datasheet (11 pp, sha256 850d2e5ca1513d6d, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF