component

SY8205FCC

Public Made by Adom

by adom

Silergy Corp DC-DC Converters, SOIC-8-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs sy8205fcc: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json Publish 0.2.0 · Ray
pads.json add symbol pin "9" for the exposed thermal pad: the footprint carries the pad and the symbol had none, so it reached no… · Ray
page.json sy8205fcc: specified limits as data (metadata.characteristics, 29 rows from the datasheet) · Ray
README.md sy8205fcc: specified limits as data (metadata.characteristics, 29 rows from the datasheet) · Ray
sy8205fcc-etched.fit.json sy8205fcc: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sy8205fcc-etched.glb sy8205fcc: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sy8205fcc-etched.step sy8205fcc: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sy8205fcc.glb fix footprint: SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.514x3.2mm -> SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.514x3.2mm (3d refresh; bo… · Ray
sy8205fcc.kicad_mod fix footprint: SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm -> SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.514x3.2mm (ep_dropped, 8 pin… · Ray
sy8205fcc.kicad_sym add symbol pin "9" for the exposed thermal pad: the footprint carries the pad and the symbol had none, so it reached no… · Ray
sy8205fcc.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
sy8205fcc.step fix footprint: SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.514x3.2mm -> SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.514x3.2mm (3d refresh; bo… · Ray

SY8205FCC

Silergy Corp · DC-DC Converters · SOIC-8-EP

SY8205FCC from Silergy Corp, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BS passive Boot-Strap pin. Supply for the high-side gate driver. Decouple to LX with a 0.1 µF ceramic capacitor.
2 LX power_out Switching node. Connect to the inductor of the buck converter output stage.
3 EN input Enable control input. Accurate 1.2 V rising threshold; add an RC network to the EN pin to program turn-on delay.
4 SS passive Soft-start programming pin. Connect a capacitor from this pin to GND to program soft-start time: Tss = Css × 0.6 V / 10 µA.
5 FB input Output feedback pin. Connect to the center tap of an external divider to program Vout = 0.6 V × (1 + R1/R2). Reference is 0.6 V typ.
6 VCC power_out Internal 3.3 V LDO output. Powers internal analog and driving circuitry. Add a 1 µF bypass capacitor to GND.
7 VIN power_in Power supply input (PVIN, tied with pin 8). 4.5 V-30 V input range. Decouple to GND with at least a 10 µF ceramic capacitor.
8 VIN power_in Power supply input (PVIN, tied with pin 7). 4.5 V-30 V input range. Decouple to GND with at least a 10 µF ceramic capacitor.
EP GND power_in Exposed thermal paddle. Ground return. Solder to the PCB ground plane for electrical connection and thermal dissipation (θJC ≈ 10 °C/W).

Key specifications

Parameter Value
Manufacturer Silergy Corp
Package SOIC-8-EP
Category PMIC
Pins 9

Ordering variants

Same part, different packaging or reel option.

  • SY8205FCC
  • SY8205FCCDNC

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage Range VIN 4.5 30 V 5
Quiescent Current IQ 200 µA IOUT=0, VFB=VREF*105% 5
Shutdown Current ISHDN 5 10 µA EN=0 5
Feedback Reference Voltage VREF 0.591 0.6 0.609 V 5
FB Input Current IFB -50 50 nA VFB=VCC 5
Top FET RON Rds(on)1 70 mΩ 5
Bottom FET RON Rds(on)2 40 mΩ 5
Bottom FET Current Limit ILIM 5 A 5
EN falling threshold VENL 1.1 1.2 1.3 V 5
EN threshold hysteresis VEN,HYS 0.1 V 5
Input UVLO threshold VUVLO 4 V 5
UVLO hysteresis VHYS 0.2 V 5
Oscillator Frequency FOSC 500 kHz IOUT=200mA 5
Min ON Time 80 ns 5
Min OFF Time 120 ns 5
Internal LDO Output VVCC 3.2 3.3 3.4 V VIN=4V 5
Thermal Shutdown Temperature TSD 160 °C 5
Thermal Shutdown Hysteresis TSD,HYS 20 °C 5
PVIN, SVIN, LX, BS, EN, PG voltage 33 V 4
VCC, FB, SS, BS-LX voltage 4 V 4
Power Dissipation SO8E PD 3.3 W TA = 25°C 4
Thermal Resistance Junction-to-Ambient SO8E θJA 30 °C/W 4
Thermal Resistance Junction-to-Case SO8E θJC 10 °C/W 4
Junction Temperature Range (absolute maximum) 125 °C 4
Lead Temperature (soldering) 260 °C 10 sec. 4
Storage Temperature Range -65 150 °C 4
Supply Input Voltage (recommended) 4.5 30 V 4
Junction Temperature Range (recommended) -40 125 °C 4
Ambient Temperature Range (recommended) -40 85 °C 4

CAD (KiCad official)

  • Symbol: SY8205FCC
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.514x3.2mm
  • 3D model: SOIC-8-EP (KiCad packages3D, STEP)
  • 3D model files: sy8205fcc-etched.step / sy8205fcc-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sy8205fcc.step / sy8205fcc.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
sy8205fcc.step 193 KB You want the bare part, or you mark your own boards.
sy8205fcc-etched.step 1.9 MB You want the part with SY8205FCC already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 460 faces against 63 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Silergy Corp datasheet (11 pp, sha256 850d2e5ca1513d6d, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF