SY8201CABC from Silergy Corp, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	BS	passive	Boot-strap pin. Supplies gate drive voltage for the internal high-side NMOS. Decouple to LX with a 100nF (0.1uF) low-ESR ceramic capacitor.
2	GND	power_in	Ground reference pin. Also serves as the case position for theta_JC thermal measurement; maximize copper area to this pin for best thermal and noise performance.
3	FB	input	Output feedback pin. Connect to the center of an external resistor divider from VOUT to program the output voltage: Vout = 0.6V * (1 + R1/R2). Internal reference is 0.6V +/-2%.
4	EN	input	Enable control input. Pull high (>1.5V) to enable the regulator; pull low (<0.4V) to shut down (I_SHDN < 5uA typ). Do not float. Absolute max VIN + 0.3V.
5	IN	power_in	Power input pin, 4.5V to 27V operating (30V absolute max). Decouple to GND with at least 1uF ceramic capacitor (4.7uF X5R low-ESR recommended) placed close to the pin.
6	LX	power_out	Switching node. Connect to the external inductor. Internal high-side (350mOhm) and low-side (150mOhm) MOSFETs switch this node between IN and GND. Minimize copper area for noise reduction.

Key specifications

Parameter	Value
Manufacturer	Silergy Corp
Package	SOT-23-6
Category	PMIC
Pins	6

Ordering variants

Same part, different packaging or reel option.

SY8201CABC

CAD (KiCad official)

Symbol: SY8201CABC
Footprint: Package_TO_SOT_SMD:SOT-23-6
3D model: SOT-23-6 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Silergy Corp datasheet (10 pp, sha256 cdb44645c76b17e1, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF