component
SY5868FKC
Public Unreviewedby Ray
Silergy Corp LED Drivers, SOP-14-150mil. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSY5868FKC
Silergy Corp · LED Drivers · SOP-14-150mil
SY5868FKC from Silergy Corp, in a SOP-14-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No connect. Leave floating or tie to ground per board practice. |
| 2 | ADJ | output | Average voltage of drain setting pin. This pin receives ripple info to regulate the output current for the LED current remover. ADJ output current (I_ADJ) is typically 10.5 uA (9.5-11.5 uA). |
| 3 | NC | unconnected | No connect. |
| 4 | GND | power_in | Ground reference pin for the IC. Connect to the system ground. |
| 5 | ISET | input | Source current setting pin. V_ISET is a 1.5V voltage source (1.44-1.56V). Sets the source current of DIMI pin for passive dimmer or resistor: I_DIMI = 5 x 1.5 / R_ISET. Max DIMI source current 2 mA typ. |
| 6 | VLOW | input | Lowest input setting pin. Sets the lowest input voltage which corresponds to 0% duty. Real minimum 0~10V input: V_LOWI = 1.55 * V_LOW - 0.726. Range 0 to V_ISET. |
| 7 | FSET | input | Dimming frequency setting pin. Sets the frequency of the DIMO pin via an external capacitor: f_DIM = 30u / ((6.6 - V_LOW) * C_FSET). PWM frequency range 400 Hz to 10 kHz. |
| 8 | DIMI | input | Dimming input pin. The dimming signal is connected to this pin. It may be a 0/1~10V analog signal, a resistor, or a PWM signal; the IC recognizes the signal type automatically. PWM ON threshold 2.3 V, PWM OFF threshold 0.8 V. |
| 9 | DIMO | output | Dimming output pin. Outputs a PWM signal to drive an opto-coupler for isolated dimming, or drives a dimmable CC regulator directly. Max duty ~99%. |
| 10 | HLCLP | input | High clamp and low clamp setting pin. If V_HLCLP > 100 mV at IC start-up, low-clamp mode is entered; otherwise high-clamp mode is used. In low-clamp: V_LCLP = (9.3/2)(V_HLCLP - 0.2) + 0.2. In high-clamp: clamp voltage is fixed 9.5V and the HLCLP resistor sets D_MAX = 67.79R_HCLP / (67.43*R_HCLP + 770.59). |
| 11 | VIN | power_in | Power supply pin for the IC. Operating range typically up to 55V; absolute max -0.3V to 60V. Turn-on threshold 9.2V typ (8.4-10.2V), turn-off = V_IN_ON - 1.3V. Integrated 60V LDO. Includes shunt at V_VIN_SHUNT ~55V (52-59V). |
| 12 | VSEN | input | LED negative sample pin. This pin receives the negative node of the LED waveform for the current remover. Recommended V_VSEN_PK < 4V and V_VSEN_VL > 0.3V. |
| 13 | DRV | output | Gate driver pin. Connect this pin to the gate of the external primary MOSFET used by the current remover. |
| 14 | NC | unconnected | No connect. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Silergy Corp |
| Package | SOP-14-150mil |
| Category | LED Drivers |
| Pins | 14 |
Ordering variants
Same part, different packaging or reel option.
SY5868FKC
CAD (KiCad official)
- Symbol:
SY5868FKC - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOP-14-150mil (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Silergy Corp datasheet (13 pp, sha256
86c6541efe73e332, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).