STM8S103K3T6C from STMicroelectronics, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	NRST	bidirectional	Bidirectional device reset pin, active low. Internal pull-up holds the pin high; drive low to force a reset. Reset state is input with weak pull-up.
2	PA1/OSCIN	bidirectional	Port A1 general-purpose I/O; alternate function is the HSE resonator/crystal input (OSCIN). Slow (O1) push-pull/open-drain output. In Halt/Active-halt mode PA1 is auto-configured as input weak pull-up and cannot wake the device.
3	PA2/OSCOUT	bidirectional	Port A2 general-purpose I/O; alternate function is the HSE resonator/crystal output (OSCOUT). Slow (O1) push-pull/open-drain output.
4	VSS	power_in	Digital ground reference.
5	VCAP	passive	1.8 V internal regulator decoupling capacitor pin. Connect an external ceramic capacitor to VSS as specified in the VCAP external capacitor section of the datasheet.
6	VDD	power_in	Digital power supply, operating range 2.95 V to 5.5 V.
7	PA3/TIM2_CH3/[SPI_NSS]	bidirectional	Port A3 GPIO with high-sink capability. Default alternate function: TIM2 channel 3. Remapped alternate function: SPI master/slave select (SPI_NSS) via option bit AFR1.
8	PF4	bidirectional	Port F4 general-purpose I/O. Slow (O1) push-pull/open-drain output, no external interrupt or high-sink capability.
9	PB7	bidirectional	Port B7 general-purpose I/O with external interrupt capability. Slow (O1) push-pull/open-drain output.
10	PB6	bidirectional	Port B6 general-purpose I/O with external interrupt capability. Slow (O1) push-pull/open-drain output.
11	PB5/I2C_SDA	bidirectional	Port B5 GPIO / I2C data (SDA). True open-drain output (no P-buffer, no pull-up, no VDD protection diode) - requires an external pull-up. I2C up to 400 kbit/s.
12	PB4/I2C_SCL	bidirectional	Port B4 GPIO / I2C clock (SCL). True open-drain output (no P-buffer, no pull-up, no VDD protection diode) - requires an external pull-up. I2C up to 400 kbit/s.
13	PB3/AIN3/TIM1_ETR	bidirectional	Port B3 GPIO with high-sink capability. Alternate functions: ADC analog input 3 (AIN3) and TIM1 external trigger input (TIM1_ETR).
14	PB2/AIN2/TIM1_CH3N	bidirectional	Port B2 GPIO with high-sink capability. Alternate functions: ADC analog input 2 (AIN2) and TIM1 inverted channel 3 output (TIM1_CH3N).
15	PB1/AIN1/TIM1_CH2N	bidirectional	Port B1 GPIO with high-sink capability. Alternate functions: ADC analog input 1 (AIN1) and TIM1 inverted channel 2 output (TIM1_CH2N).
16	PB0/AIN0/TIM1_CH1N	bidirectional	Port B0 GPIO with high-sink capability. Alternate functions: ADC analog input 0 (AIN0) and TIM1 inverted channel 1 output (TIM1_CH1N).
17	PE5/SPI_NSS	bidirectional	Port E5 GPIO with high-sink capability. Default alternate function: SPI master/slave select (SPI_NSS).
18	PC1/TIM1_CH1/UART1_CK	bidirectional	Port C1 GPIO with high-sink capability. Default alternate function: TIM1 channel 1 and UART1 synchronous clock output (UART1_CK).
19	PC2/TIM1_CH2	bidirectional	Port C2 GPIO with high-sink capability. Default alternate function: TIM1 channel 2.
20	PC3/TIM1_CH3	bidirectional	Port C3 GPIO with high-sink capability. Default alternate function: TIM1 channel 3.
21	PC4/TIM1_CH4/CLK_CCO	bidirectional	Port C4 GPIO with high-sink capability. Default alternate function: TIM1 channel 4 and configurable clock output (CLK_CCO).
22	PC5/SPI_SCK	bidirectional	Port C5 GPIO with high-sink capability. Default alternate function: SPI clock (SPI_SCK), up to 8 Mbit/s.
23	PC6/SPI_MOSI	bidirectional	Port C6 GPIO with high-sink capability. Default alternate function: SPI master-out/slave-in (SPI_MOSI).
24	PC7/SPI_MISO	bidirectional	Port C7 GPIO with high-sink capability. Default alternate function: SPI master-in/slave-out (SPI_MISO).
25	PD0/TIM1_BKIN/[CLK_CCO]	bidirectional	Port D0 GPIO with high-sink capability. Default alternate function: TIM1 break input (TIM1_BKIN). Remapped alternate function: configurable clock output (CLK_CCO) via option bit AFR5.
26	PD1/SWIM	bidirectional	Port D1 GPIO with high-sink capability. Default alternate function: SWIM (Single Wire Interface Module) data - used for on-chip programming and non-intrusive debugging. Pin is input pull-up during and after reset release.
27	PD2/[TIM2_CH3]	bidirectional	Port D2 GPIO with high-sink capability. Remapped alternate function: TIM2 channel 3 via option bit AFR1.
28	PD3/TIM2_CH2/ADC_ETR	bidirectional	Port D3 GPIO with high-sink capability. Default alternate functions: TIM2 channel 2 and ADC external trigger (ADC_ETR).
29	PD4/BEEP/TIM2_CH1	bidirectional	Port D4 GPIO with high-sink capability. Default alternate functions: TIM2 channel 1 and BEEP output (beeper).
30	PD5/UART1_TX	bidirectional	Port D5 GPIO with high-sink capability. Default alternate function: UART1 data transmit (UART1_TX). UART1 supports asynchronous, synchronous, Smartcard, IrDA, LIN master modes.
31	PD6/UART1_RX	bidirectional	Port D6 GPIO with high-sink capability. Default alternate function: UART1 data receive (UART1_RX).
32	PD7/TLI/[TIM1_CH4]	bidirectional	Port D7 GPIO with high-sink capability. Default alternate function: top-level interrupt (TLI). Remapped alternate function: TIM1 channel 4 via option bit AFR6.

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	LQFP-32(7x7)
Category	MCU
Pins	32

Ordering variants

Same part, different packaging or reel option.

STM8S103K3T6C
STM8S103K3T6CT3C
STM8S103K3T6CU6
STM8S103K3T6CU3
STM8S103K3T6CB6
STM8S103K3T6CB3
STM8S103K3T6CP6
STM8S103K3T6CP3
STM8S103K3T6CM6
STM8S103K3T6CM3

CAD (KiCad official)

Symbol: STM8S103K3T6C
Footprint: Package_QFP:LQFP-32_7x7mm_P0.8mm
3D model: LQFP-32(7x7) (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`stm8s103k3t6c.step`	413 KB	You want the bare part, or you mark your own boards.
`stm8s103k3t6c-etched.step`	4.2 MB	You want the part with `STM8S103K3T6C` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 1019 faces against 507 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (117 pp, sha256 1574cc17747269f6, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF