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STM8S003K3T6C

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)

STM8S003K3T6C from STMicroelectronics, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NRST bidirectional Active-low bidirectional reset pin with internal weak pull-up. Driven low externally or by internal reset sources (POR/BOR, watchdog, SWIM); recommended external protection network (see Fig 37).
2 PA1/OSCIN bidirectional Port A bit 1 / HSE oscillator (resonator/crystal) input. In Halt/Active-halt this pin is forced to input weak pull-up.
3 PA2/OSCOUT bidirectional Port A bit 2 / HSE oscillator (resonator/crystal) output. Standard I/O with slow (O1) output speed by default.
4 VSS power_in Digital ground reference for the MCU. Tie to the system ground plane.
5 VCAP passive Internal 1.8 V regulator decoupling pin. Must be connected to VSS through an external low-ESR ceramic capacitor (typ. 470 nF-1 uF, see 9.3.1 VCAP external capacitor).
6 VDD power_in Digital supply input, 2.95 V to 5.5 V operating range. Decouple locally with a 100 nF ceramic close to the pin.
7 PA3/TIM2_CH3/[SPI_NSS] bidirectional Port A bit 3, high-sink I/O. Default alt-function TIM2 channel 3; can be remapped to SPI_NSS (slave select) via option bit AFR1.
8 PF4 bidirectional Port F bit 4, general-purpose I/O (no alternate function assigned).
9 PB7 bidirectional Port B bit 7, standard general-purpose I/O.
10 PB6 bidirectional Port B bit 6, standard general-purpose I/O.
11 PB5/I2C_SDA bidirectional Port B bit 5 / I2C data line. True open-drain output (no P-buffer, no weak pull-up, no protection diode to VDD); requires external pull-up resistor for I2C operation.
12 PB4/I2C_SCL bidirectional Port B bit 4 / I2C clock line. True open-drain output; requires external pull-up resistor for I2C bus operation (standard up to 100 kHz, fast up to 400 kHz).
13 PB3/AIN3/TIM1_ETR bidirectional Port B bit 3, high-sink I/O. Muxed with ADC analog input channel 3 and TIM1 external trigger input.
14 PB2/AIN2/TIM1_CH3N bidirectional Port B bit 2, high-sink I/O. Muxed with ADC analog input channel 2 and TIM1 inverted (complementary) channel 3 output.
15 PB1/AIN1/TIM1_CH2N bidirectional Port B bit 1, high-sink I/O. Muxed with ADC analog input channel 1 and TIM1 inverted (complementary) channel 2 output.
16 PB0/AIN0/TIM1_CH1N bidirectional Port B bit 0, high-sink I/O. Muxed with ADC analog input channel 0 and TIM1 inverted (complementary) channel 1 output.
17 PE5/SPI_NSS bidirectional Port E bit 5, high-sink I/O. Default alt-function: SPI slave/master select (NSS).
18 PC1/TIM1_CH1/UART1_CK bidirectional Port C bit 1, high-sink I/O. Muxed with TIM1 channel 1 (PWM/capture) and UART1 synchronous clock output.
19 PC2/TIM1_CH2 bidirectional Port C bit 2, high-sink I/O. Default alt-function: TIM1 channel 2.
20 PC3/TIM1_CH3 bidirectional Port C bit 3, high-sink I/O. Default alt-function: TIM1 channel 3.
21 PC4/TIM1_CH4/CLK_CCO bidirectional Port C bit 4, high-sink I/O. Muxed with TIM1 channel 4 and configurable clock output (CLK_CCO).
22 PC5/SPI_SCK bidirectional Port C bit 5, high-sink I/O. Default alt-function: SPI clock (SCK).
23 PC6/SPI_MOSI bidirectional Port C bit 6, high-sink I/O. Default alt-function: SPI master-out/slave-in (MOSI).
24 PC7/SPI_MISO bidirectional Port C bit 7, high-sink I/O. Default alt-function: SPI master-in/slave-out (MISO).
25 PD0/TIM1_BKIN/[CLK_CCO] bidirectional Port D bit 0, high-sink I/O. Default alt-function TIM1 break input; remappable to configurable clock output (CLK_CCO) via option bit AFR5.
26 PD1/SWIM bidirectional Port D bit 1 / SWIM (Single-Wire Interface Module) debug and programming pin. Held in input pull-up during reset and after internal reset release.
27 PD2/[TIM2_CH3] bidirectional Port D bit 2, high-sink I/O. Remappable to TIM2 channel 3 via option bit AFR1 (mutually exclusive with PA3 assignment).
28 PD3/TIM2_CH2/ADC_ETR bidirectional Port D bit 3, high-sink I/O. Muxed with TIM2 channel 2 and ADC external trigger input.
29 PD4/BEEP/TIM2_CH1 bidirectional Port D bit 4, high-sink I/O. Muxed with BEEP output (sound-generation square wave) and TIM2 channel 1.
30 PD5/UART1_TX bidirectional Port D bit 5, high-sink I/O. Default alt-function: UART1 asynchronous data transmit.
31 PD6/UART1_RX bidirectional Port D bit 6, high-sink I/O. Default alt-function: UART1 asynchronous data receive.
32 PD7/TLI/[TIM1_CH4] bidirectional Port D bit 7, high-sink I/O. Default alt-function: Top Level Interrupt (TLI); remappable to TIM1 channel 4 via option bit AFR6.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-32(7x7)
Category MCU
Pins 32

Ordering variants

  • STM8S003K3T6C
  • STM8S003K3T6CTR
  • STM8S003K3T6CF3P6
  • STM8S003K3T6CF3P6TR
  • STM8S003K3T6CF3U6
  • STM8S003K3T6CF3U6TR

CAD (KiCad official)

  • Symbol: STM8S003K3T6C
  • Footprint: Package_QFP:LQFP-32_7x7mm_P0.8mm
  • 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (None pp, sha256 79e0b6f021db8416, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

Symbol & Footprint

Schematic Symbol

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PCB Footprint

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