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stm8l151c6t6

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Datasheet-verified pinout, KiCad symbol/footprint/3D.

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STM8L151C6T6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

STM8L151C6T6 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA0/USART1_CK/SWIM/BEEP/IR_TIM bidirectional Port A0 GPIO. Alternate functions: SWIM debug/program I/O (default at reset), [USART1 synchronous clock] (remap), BEEP output, and Infrared timer output. High-sink LED driver capability. Pull-up during reset and after reset release.
2 NRST/PA1 bidirectional Active-low reset input with internal pull-up at power-up. May be reconfigured as general-purpose PA1 (output push-pull or open-drain only; cannot be used as general-purpose input). See RM0031 for reconfiguration procedure.
3 PA2/OSC_IN/[USART1_TX]/[SPI1_MISO] bidirectional Port A2 GPIO / HSE crystal oscillator input (1-16 MHz). Remappable alternates: USART1 TX or SPI1 MISO.
4 PA3/OSC_OUT/[USART1_RX]/[SPI1_MOSI] bidirectional Port A3 GPIO / HSE crystal oscillator output. Remappable alternates: USART1 RX or SPI1 MOSI.
5 PA4/TIM2_BKIN/ADC1_IN2/COMP1_INP bidirectional Port A4 GPIO. Alternates: TIM2 break input, ADC1 channel 2 analog input, comparator 1 positive input. 3.6 V tolerant (TT) I/O (protection diode to VDD not implemented).
6 PA5/TIM3_BKIN/ADC1_IN1/COMP1_INP bidirectional Port A5 GPIO. Alternates: TIM3 break input, ADC1 channel 1 analog input, comparator 1 positive input. 3.6 V tolerant (TT) I/O.
7 PA6/[ADC1_TRIG]/ADC1_IN0/COMP1_INP bidirectional Port A6 GPIO. Alternates: remappable ADC1 external trigger, ADC1 channel 0 analog input, comparator 1 positive input. 3.6 V tolerant (TT) I/O.
8 PA7 bidirectional Port A7 GPIO. Five-volt tolerant (FT) I/O.
9 VSS1/VSSA/VREF- power_in Combined digital I/O ground, analog ground, and ADC1 negative voltage reference. Connect to 0 V system ground.
10 VDD power_in Digital power supply. Operating range 1.8 V to 3.6 V (down to 1.65 V at power down). Decouple with 100 nF at pin.
11 VDDA power_in Analog supply voltage for ADC, DAC, comparators, and internal reference. Tie to VDD via a small ferrite or star-connect at the LDO for best analog performance.
12 VREF+ power_in ADC1 and DAC positive voltage reference input. Tie to VDDA when not using an external reference; must be <= VDDA.
13 Reserved unconnected Reserved on STM8L151xx (without LCD). Must be tied to VDD. On STM8L152xx this pin is VLCD (LCD booster external capacitor).
14 PE0 bidirectional Port E0 GPIO. Five-volt tolerant (FT) I/O.
15 PE1/TIM1_CH2N bidirectional Port E1 GPIO. Alternate: TIM1 inverted channel 2 output (complementary PWM). 3.6 V tolerant (TT) I/O.
16 PE2/TIM1_CH3N bidirectional Port E2 GPIO. Alternate: TIM1 inverted channel 3 output (complementary PWM). 3.6 V tolerant (TT) I/O.
17 PE3 bidirectional Port E3 GPIO. 3.6 V tolerant (TT) I/O.
18 PE4 bidirectional Port E4 GPIO. 3.6 V tolerant (TT) I/O.
19 PE5/ADC1_IN23/COMP2_INP/COMP1_INP bidirectional Port E5 GPIO. Alternates: ADC1 channel 23 analog input, comparator 2 positive input, comparator 1 positive input. 3.6 V tolerant (TT) I/O.
20 PD0/TIM3_CH2/[ADC1_TRIG]/ADC1_IN22/COMP2_INP/COMP1_INP bidirectional Port D0 GPIO. Alternates: TIM3 channel 2, remappable ADC1 external trigger, ADC1 channel 22, comparator 2/1 positive input. 3.6 V tolerant (TT) I/O.
21 PD1/TIM3_ETR/ADC1_IN21/COMP2_INP/COMP1_INP bidirectional Port D1 GPIO. Alternates: TIM3 external trigger, ADC1 channel 21, comparator 2/1 positive input. 3.6 V tolerant (TT) I/O.
22 PD2/TIM1_CH1/ADC1_IN20/COMP1_INP bidirectional Port D2 GPIO. Alternates: TIM1 channel 1, ADC1 channel 20, comparator 1 positive input. 3.6 V tolerant (TT) I/O.
23 PD3/TIM1_ETR/ADC1_IN19/COMP1_INP bidirectional Port D3 GPIO. Alternates: TIM1 external trigger, ADC1 channel 19, comparator 1 positive input. 3.6 V tolerant (TT) I/O.
24 PB0/TIM2_CH1/ADC1_IN18/COMP1_INP bidirectional Port B0 GPIO. Alternates: TIM2 channel 1, ADC1 channel 18, comparator 1 positive input. 3.6 V tolerant (TT) I/O. Pull-up applied during reset phase; floats after reset release.
25 PB1/TIM3_CH1/ADC1_IN17/COMP1_INP bidirectional Port B1 GPIO. Alternates: TIM3 channel 1, ADC1 channel 17, comparator 1 positive input. 3.6 V tolerant (TT) I/O.
26 PB2/TIM2_CH2/ADC1_IN16/COMP1_INP bidirectional Port B2 GPIO. Alternates: TIM2 channel 2, ADC1 channel 16, comparator 1 positive input. 3.6 V tolerant (TT) I/O.
27 PB3/TIM2_ETR/ADC1_IN15/COMP1_INP bidirectional Port B3 GPIO. Alternates: TIM2 external trigger, ADC1 channel 15, comparator 1 positive input. 3.6 V tolerant (TT) I/O.
28 PB4/[SPI1_NSS]/ADC1_IN14/COMP1_INP bidirectional Port B4 GPIO. Alternates: remappable SPI1 slave-select (NSS), ADC1 channel 14, comparator 1 positive input. 3.6 V tolerant (TT) I/O. Pull-up during reset; floats after reset release.
29 PB5/[SPI1_SCK]/ADC1_IN13/COMP1_INP bidirectional Port B5 GPIO. Alternates: remappable SPI1 clock, ADC1 channel 13, comparator 1 positive input. 3.6 V tolerant (TT) I/O.
30 PB6/[SPI1_MOSI]/ADC1_IN12/COMP1_INP bidirectional Port B6 GPIO. Alternates: remappable SPI1 MOSI, ADC1 channel 12, comparator 1 positive input. 3.6 V tolerant (TT) I/O.
31 PB7/[SPI1_MISO]/ADC1_IN11/COMP1_INP bidirectional Port B7 GPIO. Alternates: remappable SPI1 MISO, ADC1 channel 11, comparator 1 positive input. 3.6 V tolerant (TT) I/O.
32 PF0/ADC1_IN24/DAC_OUT bidirectional Port F0 GPIO. Alternates: ADC1 channel 24 analog input, 12-bit DAC output (buffered). 3.6 V tolerant (TT) I/O.
33 PD4/TIM1_CH2/ADC1_IN10/COMP1_INP bidirectional Port D4 GPIO. Alternates: TIM1 channel 2, ADC1 channel 10, comparator 1 positive input. 3.6 V tolerant (TT) I/O.
34 PD5/TIM1_CH3/ADC1_IN9/COMP1_INP bidirectional Port D5 GPIO. Alternates: TIM1 channel 3, ADC1 channel 9, comparator 1 positive input. 3.6 V tolerant (TT) I/O.
35 PD6/TIM1_BKIN/ADC1_IN8/RTC_CALIB/VREFINT/COMP1_INP bidirectional Port D6 GPIO. Alternates: TIM1 break input, ADC1 channel 8, RTC calibration output, internal voltage reference output (VREFINT), comparator 1 positive input. 3.6 V tolerant (TT) I/O.
36 PD7/TIM1_CH1N/ADC1_IN7/RTC_ALARM/VREFINT/COMP1_INP bidirectional Port D7 GPIO. Alternates: TIM1 inverted channel 1, ADC1 channel 7, RTC alarm output, internal voltage reference output (VREFINT), comparator 1 positive input. 3.6 V tolerant (TT) I/O.
37 PC0/I2C1_SDA bidirectional Port C0 GPIO. Alternate: I2C1 data (SDA), true open-drain output. Five-volt tolerant (FT) I/O.
38 PC1/I2C1_SCL bidirectional Port C1 GPIO. Alternate: I2C1 clock (SCL), true open-drain output. Five-volt tolerant (FT) I/O.
39 VDD2 power_in Second I/O supply pin. Tie to VDD (1.8 V to 3.6 V). Provides supply to a subset of I/O drivers on the LQFP48 package.
40 VSS2 power_in Second I/O ground pin. Tie to system 0 V.
41 PC2/USART1_RX/ADC1_IN6/COMP1_INP/VREFINT bidirectional Port C2 GPIO. Alternates: USART1 receive, ADC1 channel 6 analog input, comparator 1 positive input, internal voltage reference output. 3.6 V tolerant (TT) I/O.
42 PC3/USART1_TX/ADC1_IN5/COMP1_INP/COMP2_INM bidirectional Port C3 GPIO. Alternates: USART1 transmit, ADC1 channel 5 analog input, comparator 1 positive input, comparator 2 negative input. 3.6 V tolerant (TT) I/O.
43 PC4/USART1_CK/I2C1_SMB/CCO/ADC1_IN4/COMP2_INM/COMP1_INP bidirectional Port C4 GPIO. Alternates: USART1 synchronous clock, I2C1 SMBus alert, configurable clock output (CCO), ADC1 channel 4 analog input, comparator 2 negative input, comparator 1 positive input. 3.6 V tolerant (TT) I/O.
44 PC5/OSC32_IN/[SPI1_NSS]/[USART1_TX] bidirectional Port C5 GPIO. Alternates: LSE 32 kHz crystal oscillator input, remappable SPI1 slave-select, remappable USART1 transmit.
45 PC6/OSC32_OUT/[SPI1_SCK]/[USART1_RX] bidirectional Port C6 GPIO. Alternates: LSE 32 kHz crystal oscillator output, remappable SPI1 clock, remappable USART1 receive.
46 PC7/ADC1_IN3/COMP2_INM/COMP1_INP bidirectional Port C7 GPIO. Alternates: ADC1 channel 3 analog input, comparator 2 negative input, comparator 1 positive input. 3.6 V tolerant (TT) I/O.
47 PE6/PVD_IN bidirectional Port E6 GPIO. Alternate: programmable voltage detector (PVD) external input. 3.6 V tolerant (TT) I/O.
48 PE7 bidirectional Port E7 GPIO. 3.6 V tolerant (TT) I/O.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-48(7x7)
Category MCU
Pins 48

Ordering variants

  • STM8L151C6T6
  • STM8L151C6T6STM8L151C4T6
  • STM8L151C6T6STM8L151C6U6
  • STM8L151C6T6STM8L151C4U6
  • STM8L151C6T6STM8L151K6T6
  • STM8L151C6T6STM8L151K4T6
  • STM8L151C6T6STM8L151K6U6
  • STM8L151C6T6STM8L151K4U6
  • STM8L151C6T6STM8L151G6U6
  • STM8L151C6T6STM8L151G4U6
  • STM8L151C6T6STM8L151G6Y6
  • STM8L151C6T6STM8L151G4Y6

CAD (KiCad official)

  • Symbol: STM8L151C6T6
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (None pp, sha256 6c51d6b741c9d74e, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

Symbol & Footprint

Schematic Symbol

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