component
STM8L101F3P6TR
Public Unreviewedby Ray
STMicroelectronics Microcontrollers (MCU/MPU/SOC), TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads when scrolled away or the tab is hidden.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads when scrolled away or the tab is hidden.
PCB Footprint
Open full view ↗Loads on click. Unloads when scrolled away or the tab is hidden.
Datasheet
Open in new tab ↗Loads on click. Unloads when scrolled away or the tab is hidden.
README
markdownSTM8L101F3P6TR
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · TSSOP-20
STM8L101F3P6TR from STMicroelectronics, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PC3 | bidirectional | Port C bit 3 general-purpose I/O. CMOS input with weak pull-up available; push-pull or open-drain output with 20 mA high sink/source capability. |
| 2 | PC4/USART_CK/CCO | bidirectional | Port C bit 4 GPIO with 20 mA HS drive. Alternate functions: USART synchronous clock (USART_CK) and Configurable Clock Output (CCO). Alternate function is selected via option/peripheral registers. |
| 3 | PA0/SWIM/BEEP/IR_TIM | bidirectional | Port A bit 0 GPIO with 20 mA high sink LED-driver capability. Doubles as the SWIM single-wire debug/programming pin, beeper output, and infrared timer (IR_TIM) output. Input pull-up during and after reset. |
| 4 | NRST/PA1 | bidirectional | Active-low reset input with internal pull-up (default). Can be reconfigured through option bytes as general-purpose Port A bit 1 (push-pull output only, cannot be OD or GP input). |
| 5 | PA2 | bidirectional | Port A bit 2 general-purpose I/O with 20 mA high sink/source. Configurable as floating/pull-up input with external interrupt, or push-pull/open-drain output. |
| 6 | PA3 | bidirectional | Port A bit 3 general-purpose I/O with 20 mA high sink/source. Configurable as floating/pull-up input with external interrupt, or push-pull/open-drain output. |
| 7 | VSS | power_in | Digital ground reference (0 V). Connect to the board ground plane close to the package with a low-inductance return. |
| 8 | VDD | power_in | Main digital power supply, 1.65 V to 3.6 V. Decouple with a 100 nF ceramic to VSS as close as possible to the pin. |
| 9 | PD0/TIM3_CH2/COMP1_CH3 | bidirectional | Port D bit 0 GPIO with 20 mA HS drive. Alternate functions: TIM3 channel 2 (input capture / output compare / PWM) and Comparator 1 input channel 3. |
| 10 | PB0/TIM2_CH1/COMP1_CH1 | bidirectional | Port B bit 0 GPIO with 20 mA HS drive. Alternate functions: TIM2 channel 1 and Comparator 1 input channel 1. Configured as input floating with weak pull-up during reset phase; input floating after reset release. |
| 11 | PB1/TIM3_CH1/COMP1_CH2 | bidirectional | Port B bit 1 GPIO with 20 mA HS drive. Alternate functions: TIM3 channel 1 and Comparator 1 input channel 2. |
| 12 | PB2/TIM2_CH2/COMP2_CH1 | bidirectional | Port B bit 2 GPIO with 20 mA HS drive. Alternate functions: TIM2 channel 2 and Comparator 2 input channel 1. |
| 13 | PB3/TIM2_ETR/COMP2_CH2 | bidirectional | Port B bit 3 GPIO with 20 mA HS drive. Alternate functions: TIM2 external trigger (ETR) and Comparator 2 input channel 2. |
| 14 | PB4/SPI_NSS | bidirectional | Port B bit 4 GPIO with 20 mA HS drive. Alternate function: SPI master/slave select (NSS). Pulled up during reset phase; input floating after reset release. |
| 15 | PB5/SPI_SCK | bidirectional | Port B bit 5 GPIO with 20 mA HS drive. Alternate function: SPI serial clock (SCK). |
| 16 | PB6/SPI_MOSI | bidirectional | Port B bit 6 GPIO with 20 mA HS drive. Alternate function: SPI master-out/slave-in data (MOSI). |
| 17 | PB7/SPI_MISO | bidirectional | Port B bit 7 GPIO with 20 mA HS drive. Alternate function: SPI master-in/slave-out data (MISO). |
| 18 | PC0/I2C_SDA | bidirectional | Port C bit 0 GPIO. Alternate function: I2C serial data (SDA). Output stage is true open-drain (no internal pull-up or protection diode to VDD) - external pull-up required for I2C use. |
| 19 | PC1/I2C_SCL | bidirectional | Port C bit 1 GPIO. Alternate function: I2C serial clock (SCL). Output stage is true open-drain (no internal pull-up or protection diode to VDD) - external pull-up required for I2C use. |
| 20 | PC2/USART_RX | bidirectional | Port C bit 2 GPIO with 20 mA HS drive. Alternate function: USART receive data (RX). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | TSSOP-20 |
| Category | MCU |
| Pins | 20 |
Ordering variants
Same part, different packaging or reel option.
STM8L101F3P6TRSTM8L101F1U6STM8L101F2U6STM8L101F3U6STM8L101G2U6STM8L101G3U6STM8L101K3U6STM8L101K3T6
CAD (KiCad official)
- Symbol:
STM8L101F3P6TR - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (88 pp, sha256
c8e0b0d1f3c75a46, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).