component
STM8L101F1U6ATR
Public Unreviewedby Ray
STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFQFPN-20(3x3). Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Symbol & Footprint
Schematic Symbol
Open full view ↗PCB Footprint
Open full view ↗Datasheet
Open in new tab ↗README
markdownSTM8L101F1U6ATR
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · UFQFPN-20(3x3)
STM8L101F1U6ATR from STMicroelectronics, in a UFQFPN-20(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NRST/PA1 | bidirectional | Active-low reset input with internal pull-up at power-up; can be reconfigured as general-purpose I/O PA1 (push-pull output only, not open-drain and not input) via option byte. High-sink capable (20 mA). |
| 2 | PA2 | bidirectional | General-purpose I/O port A bit 2. Supports floating or weak pull-up input, external interrupt, open-drain or push-pull output, and 20 mA high sink/source drive. |
| 3 | PA6/COMP_REF | bidirectional | General-purpose I/O port A bit 6, alternate function is COMP_REF, the external voltage reference input shared by comparators COMP1 and COMP2. High-sink/source (20 mA) capable, with weak pull-up and external interrupt support. |
| 4 | VSS | power_in | Digital ground return for the device (0 V reference). |
| 5 | VDD | power_in | Main supply voltage input. Operating range 1.65 V to 3.6 V. Powers core and I/Os; an on-chip regulator derives the internal 1.8 V rail. |
| 6 | PD0/TIM3_CH2/COMP1_CH3 | bidirectional | General-purpose I/O port D bit 0. Alternate functions: TIM3 channel 2 (input capture / output compare / PWM) or COMP1 channel 3 analog input. 20 mA high-sink/source capable. |
| 7 | PB0/TIM2_CH1/COMP1_CH1 | bidirectional | General-purpose I/O port B bit 0. Alternate functions: TIM2 channel 1 or COMP1 channel 1 analog input. 20 mA high-sink/source drive. |
| 8 | PB1/TIM3_CH1/COMP1_CH2 | bidirectional | General-purpose I/O port B bit 1. Alternate functions: TIM3 channel 1 or COMP1 channel 2 analog input. 20 mA high-sink/source drive. |
| 9 | PB2/TIM2_CH2/COMP2_CH1 | bidirectional | General-purpose I/O port B bit 2. Alternate functions: TIM2 channel 2 or COMP2 channel 1 analog input. 20 mA high-sink/source drive. |
| 10 | PB3/TIM2_ETR/COMP2_CH2 | bidirectional | General-purpose I/O port B bit 3. Alternate functions: TIM2 external trigger input or COMP2 channel 2 analog input. 20 mA high-sink/source drive. |
| 11 | PB4/SPI_NSS | bidirectional | SPI master/slave select (NSS), or general-purpose port B bit 4. 20 mA high-sink/source drive; supports open-drain or push-pull output. |
| 12 | PB5/SPI_SCK | bidirectional | SPI clock (SCK), or general-purpose port B bit 5. 20 mA high-sink/source drive. |
| 13 | PB6/SPI_MOSI | bidirectional | SPI master-out/slave-in data (MOSI), or general-purpose port B bit 6. 20 mA high-sink/source drive. |
| 14 | PB7/SPI_MISO | bidirectional | SPI master-in/slave-out data (MISO), or general-purpose port B bit 7. 20 mA high-sink/source drive. |
| 15 | PC0/I2C_SDA | bidirectional | I2C serial data (SDA). True open-drain I/O (no P-buffer, no weak pull-up, no protection diode to VDD) - external pull-up to VDD required. Also usable as general-purpose port C bit 0. |
| 16 | PC1/I2C_SCL | bidirectional | I2C serial clock (SCL). True open-drain I/O (no P-buffer, no weak pull-up, no protection diode to VDD) - external pull-up to VDD required. Also usable as general-purpose port C bit 1. |
| 17 | PC2/USART_RX | bidirectional | USART receive data (RX), or general-purpose port C bit 2. 20 mA high-sink/source drive. |
| 18 | PC3/USART_TX | bidirectional | USART transmit data (TX), or general-purpose port C bit 3. 20 mA high-sink/source drive. |
| 19 | PC4/USART_CK/CCO | bidirectional | USART synchronous clock (CK) or configurable clock output (CCO), or general-purpose port C bit 4. 20 mA high-sink/source drive. |
| 20 | PA0/SWIM/BEEP/IR_TIM | bidirectional | SWIM single-wire debug/programming interface (primary function after reset), beeper output (BEEP), and infrared timer output (IR_TIM). Also usable as GPIO PA0. PA0 has the LED-driver high-sink capability enabled via IR_CR register. Input pull-up during and after reset release. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | UFQFPN-20(3x3) |
| Category | Embedded Processors & Controllers |
| Pins | 20 |
Ordering variants
Same part, different packaging or reel option.
STM8L101F1U6ATRSTM8L101F1U6ATRF2U6ATRSTM8L101F1U6ATRF3U6ATRSTM8L101F1U6TRSTM8L101F1U6ATRF2U6TRSTM8L101F1U6ATRF3U6TRSTM8L101F1U6ATRF2T6TRSTM8L101F1U6ATRF3T6TRSTM8L101F1U6ATRG2U6TRSTM8L101F1U6ATRG3U6TRSTM8L101F1U6ATRG2U6ATRSTM8L101F1U6ATRG3U6ATRSTM8L101F1U6ATRK3U6TRSTM8L101F1U6ATRK3T6TR
CAD (KiCad official)
- Symbol:
STM8L101F1U6ATR - Footprint:
Package_DFN_QFN:ST_UFQFPN-20_3x3mm_P0.5mm - 3D model: UFQFPN-20(3x3) (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (None pp, sha256
c8e0b0d1f3c75a46, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).