STM32G030F6P6TR from STMicroelectronics, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	PB7/PB8	bidirectional	General-purpose 5 V-tolerant I/O. Bonded pad combining PB7 and PB8; internal port selection through GPIO configuration. Alternate functions include USART1_RX, SPI2_MOSI, TIM17_CH1N, I2C1_SDA/SCL and TIM16_CH1.
2	PB9/PC14-OSC32_IN	bidirectional	Bonded pad combining PB9 and PC14. PC14 also brings out the OSC32_IN input for the 32.768 kHz LSE crystal oscillator. 5 V-tolerant I/O; alternate functions include TIM17_CH1, SPI2_NSS, I2C1_SDA and TIM1_BKIN2.
3	PC15-OSC32_OUT	bidirectional	GPIO PC15 with OSC32_OUT additional function for the 32.768 kHz LSE crystal oscillator output. 5 V-tolerant; alternate functions include OSC32_EN and OSC_EN.
4	VDD/VDDA	power_in	Main digital and analog supply, 2.0 V to 3.6 V. VDD and VDDA are bonded to the same pin on TSSOP20; decouple with 100 nF close to the pin plus a 4.7 uF bulk cap.
5	VSS/VSSA	power_in	Digital and analog ground reference, 0 V. VSS and VSSA are bonded together on TSSOP20.
6	NRST	bidirectional	Bidirectional active-low system reset. Internal weak pull-up (~40 kOhm). Drive low externally or filter/decouple with a 100 nF capacitor to VSS.
7	PA0	bidirectional	General-purpose 5 V-tolerant I/O with analog-switch capability. Alternate functions: SPI2_SCK, USART2_CTS. Additional: ADC_IN0, TAMP_IN2, WKUP1.
8	PA1	bidirectional	General-purpose 5 V-tolerant I/O with analog-switch and diode-to-VDD options. Alternate functions: SPI1_SCK/I2S1_CK, USART2_RTS_DE_CK, I2C1_SMBA, EVENTOUT. Additional: ADC_IN1.
9	PA2	bidirectional	General-purpose 5 V-tolerant I/O with analog-switch capability. Alternate functions: SPI1_MOSI/I2S1_SD, USART2_TX. Additional: ADC_IN2, WKUP4, LSCO.
10	PA3	bidirectional	General-purpose 5 V-tolerant I/O with analog-switch and diode-to-VDD options. Alternate functions: SPI2_MISO, USART2_RX, EVENTOUT. Additional: ADC_IN3.
11	PA4	bidirectional	General-purpose 5 V-tolerant I/O with analog-switch capability. Alternate functions: SPI1_NSS/I2S1_WS, SPI2_MOSI, TIM14_CH1, EVENTOUT. Additional: ADC_IN4, TAMP_IN1, RTC_TS, RTC_OUT1, WKUP2.
12	PA5	bidirectional	General-purpose 5 V-tolerant I/O with analog-switch and diode-to-VDD options. Alternate functions: SPI1_SCK/I2S1_CK, EVENTOUT. Additional: ADC_IN5.
13	PA6	bidirectional	General-purpose 5 V-tolerant I/O with analog-switch and diode-to-VDD options. Alternate functions: SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BK, TIM16_CH1. Additional: ADC_IN6.
14	PA7	bidirectional	General-purpose 5 V-tolerant I/O with analog-switch capability. Alternate functions: SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM1_CH1N, TIM14_CH1, TIM17_CH1. Additional: ADC_IN7.
15	PB0/PB1/PB2/PA8	bidirectional	Multi-bonded pad combining PB0, PB1, PB2 and PA8 on TSSOP20. Alternate functions available depending on port selected include SPI1_NSS/I2S1_WS, TIM3_CH3/CH4, TIM1_CH2N/CH3N, TIM14_CH1, SPI2_MISO, MCO, TIM1_CH1 and EVENTOUT. Additional: ADC_IN8/9/10.
16	PA11[PA9]	bidirectional	5 V-tolerant, Fm+ capable I/O with analog-switch option. Default port is PA11; SYSCFG_CFGR1 can remap PA9 onto this pad. Alternate functions: SPI1_MISO/I2S1_MCK, USART1_CTS, TIM1_CH4, TIM1_BK2, I2C2_SCL. Additional: ADC_IN15.
17	PA12[PA10]	bidirectional	5 V-tolerant, Fm+ capable I/O with analog-switch option. Default port is PA12; SYSCFG_CFGR1 can remap PA10 onto this pad. Alternate functions: SPI1_MOSI/I2S1_SD, USART1_RTS_DE_CK, TIM1_ETR, I2S_CKIN, I2C2_SDA. Additional: ADC_IN16.
18	PA13	bidirectional	5 V-tolerant I/O with analog-switch and diode-to-VDD options. Default after reset: SWDIO (serial-wire debug data) with internal pull-up enabled. Alternate functions: IR_OUT, EVENTOUT. Additional: ADC_IN17.
19	PA15/PA14-BOOT0	bidirectional	Multi-bonded pad combining PA15 and PA14. PA14 carries SWCLK (serial-wire clock) after reset with internal pull-down enabled, and also functions as BOOT0 during startup. Alternate functions: USART2_TX, SPI1_NSS/I2S1_WS, USART2_RX, EVENTOUT. Additional: ADC_IN18, BOOT0.
20	PB3/PB4/PB5/PB6	bidirectional	Multi-bonded pad combining PB3, PB4, PB5 and PB6 on TSSOP20 (Fm+ capable). Alternate functions include SPI1_SCK/I2S1_CK, TIM1_CH2, USART1_RTS_DE_CK, SPI1_MISO/I2S1_MCK, TIM3_CH1/CH2, USART1_CTS, TIM17_BK, SPI1_MOSI/I2S1_SD, TIM16_BK, I2C1_SMBA, USART1_TX, TIM1_CH3, TIM16_CH1N, SPI2_MISO, I2C1_SCL, EVENTOUT. Additional: WKUP6.

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	TSSOP-20
Category	MCU
Pins	20

Ordering variants

Same part, different packaging or reel option.

STM32G030F6P6TR
STM32G030F6P6TRF8P6
STM32G030F6P6TRF8P6TR
STM32G030F6P6TRJ6M6
STM32G030F6P6TRJ6M6TR
STM32G030F6P6TRJ8M6
STM32G030F6P6TRJ8M6TR
STM32G030F6P6TRK6T6
STM32G030F6P6TRK6T6TR
STM32G030F6P6TRK8T6
STM32G030F6P6TRK8T6TR
STM32G030F6P6TRC6T6
STM32G030F6P6TRC6T6TR
STM32G030F6P6TRC8T6
STM32G030F6P6TRC8T6TR

CAD (KiCad official)

Symbol: STM32G030F6P6TR
Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
3D model: TSSOP-20 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`stm32g030f6p6tr.step`	267 KB	You want the bare part, or you mark your own boards.
`stm32g030f6p6tr-etched.step`	4.0 MB	You want the part with `STM32G030F6P6TR` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 954 faces against 327 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (93 pp, sha256 bd4d70f72b2e82c5, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF