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Contents

README

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STGAP2SCMTR

STMicroelectronics · Isolators - Gate Drivers · SO-8

STGAP2SCMTR from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Driver logic supply voltage (input side). Recommended 3.1 V to 5.5 V vs. GND; absolute max 6.5 V. Powers the low-voltage control/logic domain.
2 IN+ input Non-inverting logic input (active high). 3.3 V / 5 V TTL/CMOS compatible with hysteresis; internal ~100 kΩ pull-down. Voltage range 0 to 5.5 V vs. GND.
3 IN- input Inverting logic input (active low). 3.3 V / 5 V TTL/CMOS compatible with hysteresis; internal ~100 kΩ pull-down. Used with IN+ to implement HW interlocking / polarity selection.
4 GND power_in Driver logic ground (input-side reference). Galvanically isolated from GNDISO (up to ±1700 V VISO-OP).
5 VH power_in Gate driving positive voltage supply, referenced to GNDISO. Recommended 9.6 V to 26 V; UVLO turn-on ~9.1 V typ. Supplies the isolated output driver.
6 GOUT output Combined sink/source gate driver output. 4 A sink/source capability with rail-to-rail swing between VH and GNDISO. Drives the power MOSFET/IGBT gate.
7 CLAMP output Active Miller clamp output. Provides a low-impedance path to GNDISO to shunt Miller current during off-state, preventing false turn-on due to dV/dt in half-bridge topologies.
8 GNDISO power_in Gate driving isolated ground (output-side reference for VH, GOUT, CLAMP). Galvanically isolated from GND (input-side) up to ±1700 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SO-8
Category PMIC
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • STGAP2SCMTR

CAD (KiCad official)

  • Symbol: STGAP2SCMTR
  • Footprint: Package_SO:TI_SO-PowerPAD-8
  • 3D model: SO-8 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (23 pp, sha256 c88ffafc488db499, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF