component
st1s41phr
Public Unreviewedby Ray
STMicroelectronics DC-DC Converters, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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README
markdownST1S41PHR
STMicroelectronics · DC-DC Converters · SOIC-8
ST1S41PHR from STMicroelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VINA | power_in | Unregulated DC analog input supply for the control circuitry. Operating range 4.0 V to 18 V (absolute max -0.3 V to 20 V). Should be locally bypassed with a ceramic capacitor to AGND. |
| 2 | EN | input | Active-high enable input. Device is ON with VEN > 1.2 V (typ) and OFF with VEN < 0.4 V (typ). Input current ~2 µA; absolute-max range -0.3 V to VINA. |
| 3 | FB | input | Feedback input to the internal error amplifier. Regulates to an internal 0.8 V reference (0.784-0.816 V). Tie VOUT directly to FB for a 0.8 V rail, or use an external resistor divider from VOUT to FB (to AGND) for higher output voltages. FB bias current ~50 nA. |
| 4 | AGND | power_in | Analog ground reference for the control section. Should be tied to the system ground plane and connected to PGND and the exposed pad. |
| 5 | NC | unconnected | No internal connection. Datasheet notes it can be connected to ground. |
| 6 | VINSW | power_in | Power input voltage for the internal high-side switch. Same 4.0 V to 18 V range as VINA; requires a low-ESR ceramic input capacitor placed as close as possible to this pin and PGND to handle the switching ripple current. |
| 7 | SW | output | Regulator switching node - the drain junction of the integrated high-side PMOS and low-side NMOS power MOSFETs. Connect to the external inductor. Rated -1 V to VIN; capable of ~4 A output current with 5-7 A cycle-by-cycle current limit. |
| 8 | PGND | power_in | Power ground return for the low-side power MOSFET. Must be tied to AGND and the exposed pad through a solid, low-impedance ground plane. |
| 9 | ePAD | power_in | Exposed thermal pad on the underside of the package. Electrically ground; must be soldered to a ground copper area for proper heat dissipation (RθJA ≈ 40 °C/W when mounted on the demonstration board). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOIC-8 |
| Category | PMIC |
| Pins | 9 |
Ordering variants
ST1S41PHRST1S41PHRPUR
CAD (KiCad official)
- Symbol:
ST1S41PHR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (None pp, sha256
d195ca529d24bfe0, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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