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ST16C554DIQ64TR-F

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MaxLinear UART, TQFP-64(10x10). Datasheet-verified pinout, KiCad symbol/footprint/3D.

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ST16C554DIQ64TR-F

MaxLinear · UART · TQFP-64(10x10)

ST16C554DIQ64TR-F from MaxLinear, in a TQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 -DSRA input Data Set Ready channel A (active low). Modem status input to UART A; state readable via MSR.
2 -CTSA input Clear To Send channel A (active low). Modem input to UART A indicating the DCE is ready to accept transmit data.
3 -DTRA output Data Terminal Ready channel A (active low). Driven by MCR bit-0 for UART A.
4 VCC power_in Positive supply input (+5 V typical).
5 -RTSA output Request To Send channel A (active low). Driven by MCR bit-1 for UART A.
6 INTA output Interrupt output for UART channel A (active high in 16 mode). Asserts on RX errors, RX data available, TX empty, or modem status changes when enabled via IER and MCR bit-3.
7 -CSA input Chip Select channel A (active low). Enables CPU bus access to UART A internal registers in 16 mode.
8 TXA output Serial transmit data output for UART channel A. Idles high; disabled to high during reset or local loopback.
9 -IOW input Active-low write strobe. A logic 0 transfers D0-D7 from the CPU into the internal register selected by A0-A2 and the active -CS.
10 TXB output Serial transmit data output for UART channel B. Idles high; disabled to high during reset or local loopback.
11 -CSB input Chip Select channel B (active low). Enables CPU bus access to UART B internal registers in 16 mode.
12 INTB output Interrupt output for UART channel B (active high in 16 mode).
13 -RTSB output Request To Send channel B (active low). Driven by MCR bit-1 for UART B.
14 GND power_in Signal and power ground.
15 -DTRB output Data Terminal Ready channel B (active low). Driven by MCR bit-0 for UART B.
16 -CTSB input Clear To Send channel B (active low). Modem input to UART B.
17 -DSRB input Data Set Ready channel B (active low).
18 -CDB input Carrier Detect channel B (active low). A logic 0 indicates the modem has detected a carrier for UART B.
19 -RIB input Ring Indicator channel B (active low). A rising edge on this input generates an interrupt.
20 RXB input Serial receive data input for UART channel B. Idles high; disabled during local loopback.
21 VCC power_in Positive supply input (+5 V typical).
22 A2 input Address bit 2. Selects the internal UART register together with A0/A1 and the active -CS.
23 A1 input Address bit 1. Selects the internal UART register together with A0/A2 and the active -CS.
24 A0 input Address bit 0. Selects the internal UART register together with A1/A2 and the active -CS.
25 XTAL1 input Crystal or external clock input for the on-chip oscillator and baud rate generator. Connect a crystal between XTAL1 and XTAL2, or drive with an external clock.
26 XTAL2 output Crystal oscillator output / buffered clock output. Pairs with XTAL1 for a crystal oscillator, or leave floating when driving XTAL1 externally.
27 RESET input Master reset (active high in 16 mode). Clears internal registers and forces TX/RX to idle/disabled.
28 GND power_in Signal and power ground.
29 RXC input Serial receive data input for UART channel C.
30 -RIC input Ring Indicator channel C (active low).
31 -CDC input Carrier Detect channel C (active low).
32 -DSRC input Data Set Ready channel C (active low).
33 -CTSC input Clear To Send channel C (active low).
34 -DTRC output Data Terminal Ready channel C (active low). Driven by MCR bit-0 for UART C.
35 VCC power_in Positive supply input (+5 V typical).
36 -RTSC output Request To Send channel C (active low). Driven by MCR bit-1 for UART C.
37 INTC output Interrupt output for UART channel C (active high in 16 mode).
38 -CSC input Chip Select channel C (active low). Enables CPU bus access to UART C internal registers in 16 mode.
39 TXC output Serial transmit data output for UART channel C.
40 -IOR input Active-low read strobe. A logic 0 drives the register selected by A0-A2 and the active -CS onto D0-D7.
41 TXD output Serial transmit data output for UART channel D.
42 -CSD input Chip Select channel D (active low). Enables CPU bus access to UART D internal registers in 16 mode.
43 INTD output Interrupt output for UART channel D (active high in 16 mode).
44 -RTSD output Request To Send channel D (active low). Driven by MCR bit-1 for UART D.
45 GND power_in Signal and power ground.
46 -DTRD output Data Terminal Ready channel D (active low). Driven by MCR bit-0 for UART D.
47 -CTSD input Clear To Send channel D (active low).
48 -DSRD input Data Set Ready channel D (active low).
49 -CDD input Carrier Detect channel D (active low).
50 -RID input Ring Indicator channel D (active low).
51 RXD input Serial receive data input for UART channel D.
52 VCC power_in Positive supply input (+5 V typical).
53 D0 bidirectional Three-state CPU data bus bit 0 (LSB). Reads/writes internal registers on -IOR/-IOW strobes.
54 D1 bidirectional Three-state CPU data bus bit 1.
55 D2 bidirectional Three-state CPU data bus bit 2.
56 D3 bidirectional Three-state CPU data bus bit 3.
57 D4 bidirectional Three-state CPU data bus bit 4.
58 D5 bidirectional Three-state CPU data bus bit 5.
59 D6 bidirectional Three-state CPU data bus bit 6.
60 D7 bidirectional Three-state CPU data bus bit 7 (MSB).
61 GND power_in Signal and power ground.
62 RXA input Serial receive data input for UART channel A.
63 -RIA input Ring Indicator channel A (active low).
64 -CDA input Carrier Detect channel A (active low).

Key specifications

Parameter Value
Manufacturer MaxLinear
Package TQFP-64(10x10)
Category Interface
Pins 64

Ordering variants

Same part, different packaging or reel option.

  • ST16C554DIQ64TR-F
  • ST16C554DIQ64TR-FDCQ64
  • ST16C554DIQ64TR-FCQ64
  • ST16C554DIQ64TR-FDCJ68
  • ST16C554DIQ64TR-FDIJ68

CAD (KiCad official)

  • Symbol: ST16C554DIQ64TR-F
  • Footprint: Package_QFP:TQFP-64_10x10mm_P0.5mm
  • 3D model: TQFP-64(10x10) (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: MaxLinear datasheet (40 pp, sha256 866ff1affa33e5fa, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF