SSP6206-18NR from Shanghai Siproin Microelectronics, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	GND	power_in	Ground / VSS reference pin for the LDO. Connect to system ground.
2	VOUT	power_out	Regulated output voltage pin. For SSP6206-18N, provides fixed 1.8V ±2% at up to 300mA. Requires a 1.0µF ceramic output capacitor (CL) to ground for stability.
3	VIN	power_in	Unregulated input supply pin, 1.6V to 8V absolute max. Requires a 1.0µF ceramic input capacitor (CIN) to ground. Dropout is 0.28V typ (0.42V max) at 100mA for the 1.8V variant.

Key specifications

Parameter	Value
Manufacturer	Shanghai Siproin Microelectronics
Package	SOT-23
Category	PMIC
Pins	3

Ordering variants

Same part, different packaging or reel option.

SSP6206-18NR
SSP6206-18NR18NG
SSP6206-18NR18MR
SSP6206-18NR18MG
SSP6206-18NR18PR
SSP6206-18NR18PG

CAD (KiCad official)

Symbol: SSP6206-18NR
Footprint: Package_TO_SOT_SMD:SOT-23
3D model: SOT-23 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`ssp6206-18nr.step`	59 KB	You want the bare part, or you mark your own boards.
`ssp6206-18nr-etched.step`	2.4 MB	You want the part with `SSP6206-18NR` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 575 faces against 69 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Shanghai Siproin Microelectronics datasheet (8 pp, sha256 378c7dd5d41d3f18, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF