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SSP6206-18NR

Public Made by Adom

by adom

Shanghai Siproin Microelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs ssp6206-18nr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json ssp6206-18nr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md ssp6206-18nr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
ssp6206-18nr-etched.fit.json ssp6206-18nr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ssp6206-18nr-etched.glb ssp6206-18nr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ssp6206-18nr-etched.step ssp6206-18nr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ssp6206-18nr.glb Publish 0.1.0 · Ray
ssp6206-18nr.kicad_mod Publish 0.1.0 · Ray
ssp6206-18nr.kicad_sym Publish 0.1.0 · Ray
ssp6206-18nr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
ssp6206-18nr.step Publish 0.1.0 · Ray

SSP6206-18NR

Shanghai Siproin Microelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23

SSP6206-18NR from Shanghai Siproin Microelectronics, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground / VSS reference pin for the LDO. Connect to system ground.
2 VOUT power_out Regulated output voltage pin. For SSP6206-18N, provides fixed 1.8V ±2% at up to 300mA. Requires a 1.0µF ceramic output capacitor (CL) to ground for stability.
3 VIN power_in Unregulated input supply pin, 1.6V to 8V absolute max. Requires a 1.0µF ceramic input capacitor (CIN) to ground. Dropout is 0.28V typ (0.42V max) at 100mA for the 1.8V variant.

Key specifications

Parameter Value
Manufacturer Shanghai Siproin Microelectronics
Package SOT-23
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • SSP6206-18NR
  • SSP6206-18NR18NG
  • SSP6206-18NR18MR
  • SSP6206-18NR18MG
  • SSP6206-18NR18PR
  • SSP6206-18NR18PG

CAD (KiCad official)

  • Symbol: SSP6206-18NR
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: ssp6206-18nr-etched.step / ssp6206-18nr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ssp6206-18nr.step / ssp6206-18nr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
ssp6206-18nr.step 59 KB You want the bare part, or you mark your own boards.
ssp6206-18nr-etched.step 2.4 MB You want the part with SSP6206-18NR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 575 faces against 69 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Shanghai Siproin Microelectronics datasheet (8 pp, sha256 378c7dd5d41d3f18, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF