component

SS4125

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by Ray

orisilicon Leakage Protection ICs, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.

componentpower management (pmic)ss4125
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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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SS4125

orisilicon · Leakage Protection ICs · SOP-8

SS4125 from orisilicon, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN1 input Op-amp input pin 1. Non-inverting/inverting input of the internal leakage-current sense amplifier; connects to one side of the current transformer (CT) sample resistor. Input voltage range -0.3 V to +6 V.
2 IN2 input Op-amp input pin 2. Second differential input of the internal leakage-current sense amplifier; connects to the other side of the CT sample resistor. Leakage trip threshold V_T typ 4.95 mV.
3 GND power_in Device ground reference (0 V). All voltages on the chip are referenced to this pin.
4 OA output Filter and inverse-time-delay adjustable output pin. External capacitor C_OA sets the integration time constant for the inverse-time leakage response; internal threshold 1.5 V. Voltage range -0.3 V to +6 V.
5 DLY output Fixed delay pin; external delay capacitor C_D sets the trip delay time via T_D = C_D × V_REF / I_D (V_REF = 1.5 V, I_D ≈ 3 µA typ). Delay-injection current I_DLY 2.7-3.3 µA.
6 OSHV output High-voltage MOS trigger output pin. Drives an external high-voltage MOSFET gate; typical output V_OS_HV = 10 V (max 12 V) with 3 pulses of 30 ms:100 ms duty-cycle control. Output voltage range -0.3 V to +15 V.
7 OSLV output Low-voltage SCR (thyristor) trigger output pin. Typical output V_OS_LV = 5 V (max 6 V), drive current I_OS_LV 250-850 µA typ (min 130 µA over full temperature). Output range -0.3 V to +6 V.
8 VS power_in Supply pin. Internally clamped/regulated; clamp voltage V_S1 typ 12 V at I_S = 1 mA (V_S2 11-13 V over full temperature). Absolute max VS to GND = +24 V. Quiescent current ~200 µA typ (I_S1 168-252 µA at V_S = 8 V).

Key specifications

Parameter Value
Manufacturer orisilicon
Package SOP-8
Category Power Management (PMIC)
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • SS4125

CAD (KiCad official)

  • Symbol: SS4125
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: orisilicon datasheet (14 pp, sha256 920b35b10db89eef, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF