component
SP813LEN-L
Public Unreviewedby Ray
MaxLinear Supervisor And Reset ICs, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSP813LEN-L
MaxLinear · Supervisor And Reset ICs · SOIC-8
SP813LEN-L from MaxLinear, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | MR | input | Manual Reset input, active LOW. Triggers a 200ms reset pulse when pulled below 0.8V. Has an internal ~250µA pull-up to VCC and is TTL/CMOS compatible; can be driven by a logic line or shorted to GND with a pushbutton (debounced by the 140ms minimum reset pulse width). |
| 2 | VCC | power_in | +5V power supply input. Operating range 4.75V to 5.5V; absolute maximum -0.3V to 6.0V. Reset threshold is 4.65V (typ) for the SP813L. |
| 3 | GND | power_in | Ground reference for all signals. |
| 4 | PFI | input | Power-Fail Input to the internal comparator's non-inverting side (inverting input is tied to a 1.25V reference). When PFI < 1.25V, PFO is driven LOW. Tie to GND or VCC when unused. Input current ±25nA max. |
| 5 | PFO | output | Power-Fail Output from the 1.25V comparator. LOW while PFI < 1.25V, HIGH otherwise. Typical use is an early power-fail interrupt to the microprocessor, driven from a resistor divider on the unregulated rail. |
| 6 | WDI | input | Watchdog Input. If WDI stays HIGH or LOW for more than 1.6s (typ), WDO goes LOW. Floating WDI or driving it from a tri-state buffer disables the watchdog. The watchdog is cleared on any rising/falling edge on WDI, when WDI is tri-stated, or while RESET is asserted. Minimum WDI pulse width 100ns. |
| 7 | RESET | output | Active-HIGH reset output (SP813L has only this reset polarity; it is the complement of the SP705/706 active-LOW RESET). Held HIGH whenever VCC is below the 4.65V reset threshold, and for 200ms after VCC recovers above threshold or MR transitions LOW→HIGH. Valid down to VCC = 1.1V. |
| 8 | WDO | output | Watchdog Output. Pulls LOW when the 1.6s watchdog times out and stays LOW until the watchdog is cleared. Also driven LOW whenever VCC is below the reset threshold (low-line indication); has no minimum pulse width, so it returns HIGH with no delay once VCC recovers. Commonly tied to MR to fold a watchdog timeout into a system RESET. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MaxLinear |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
SP813LEN-L/TR
CAD (KiCad official)
- Symbol:
SP813LEN-L - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: MaxLinear datasheet (None pp, sha256
958b898aba7ca3c3, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).