SP491EEN-L from MaxLinear, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	NC	unconnected	No internal connection. Leave floating or tie to ground.
2	R	output	Receiver output (RO). CMOS/TTL logic-level output that reflects the differential state of the A/B receiver inputs. Tri-stated when /RE is high. Fail-safe: goes to logic HIGH when inputs are open/undriven.
3	/RE	input	Receiver output enable, active LOW. Logic low enables the differential receiver so pin 2 (R) drives the bus state; logic high tri-states the receiver output. Applies to D, /RE, DE input thresholds: VIH ≥ 2.0 V, VIL ≤ 0.8 V.
4	DE	input	Driver output enable, active HIGH. Logic high enables the differential driver outputs Y/Z; logic low tri-states them. VIH ≥ 2.0 V, VIL ≤ 0.8 V.
5	D	input	Driver input (DI). CMOS/TTL logic-level input; drives the differential Y/Z outputs when DE is high. VIH ≥ 2.0 V, VIL ≤ 0.8 V, ±10 µA input current.
6	GND	power_in	Ground reference. Pin-compatible convention (LTC491/SN75180) ties pin 6 and pin 7 to GND together.
7	GND	power_in	Ground reference. Return for VCC and reference for all logic and differential I/O.
8	NC	unconnected	No internal connection. Leave floating or tie to ground.
9	Y	output	Non-inverting driver output (RS-485/RS-422 bus). Together with Z forms the differential transmit pair. Guaranteed
10	Z	output	Inverting driver output (RS-485/RS-422 bus). Complement of Y. Common-mode output range 0-3 V typical; tri-stated when DE is low.
11	B	input	Inverting receiver input (RS-485/RS-422 bus). Together with A forms the differential receive pair. ±200 mV differential input threshold, 15 kΩ typical input resistance (12 kΩ min), common-mode range -7 V to +12 V.
12	A	input	Non-inverting receiver input (RS-485/RS-422 bus). ±200 mV differential input threshold, 70 mV typical hysteresis, common-mode range -7 V to +12 V.
13	NC	unconnected	No internal connection. Leave floating or tie to ground.
14	VCC	power_in	Positive supply, +5 V ±5% (4.75 V to 5.25 V). Typical supply current 900 µA. Decouple locally to GND with a ceramic bypass capacitor.

Key specifications

Parameter	Value
Manufacturer	MaxLinear
Package	SOIC-14
Category	Interface
Pins	14

Ordering variants

Same part, different packaging or reel option.

SP491EEN-L
SP491EEN-L/TR
SP491ECN-L
SP491ECN-L/TR
SP491ECP-L
SP491EEP-L

CAD (KiCad official)

Symbol: SP491EEN-L
Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
3D model: SOIC-14 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: MaxLinear datasheet (12 pp, sha256 54e049190b3a7e04, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF