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SN74LVC574ADWR

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by Ray

Texas Instruments Flip Flops, SOIC-20-300mil. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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Symbol & Footprint

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Datasheet

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Contents

README

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SN74LVC574ADWR

Texas Instruments · Flip Flops · SOIC-20-300mil

SN74LVC574ADWR from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE input Output enable input, active low; when low outputs drive normal logic, when high outputs are high-impedance.
2 1D input Data input for flip-flop 1, 0-5.5 V input voltage range, captured to Q1 on positive CLK transition.
3 2D input Data input for flip-flop 2, 0-5.5 V input voltage range, captured to Q2 on positive CLK transition.
4 3D input Data input for flip-flop 3, 0-5.5 V input voltage range, captured to Q3 on positive CLK transition.
5 4D input Data input for flip-flop 4, 0-5.5 V input voltage range, captured to Q4 on positive CLK transition.
6 5D input Data input for flip-flop 5, 0-5.5 V input voltage range, captured to Q5 on positive CLK transition.
7 6D input Data input for flip-flop 6, 0-5.5 V input voltage range, captured to Q6 on positive CLK transition.
8 7D input Data input for flip-flop 7, 0-5.5 V input voltage range, captured to Q7 on positive CLK transition.
9 8D input Data input for flip-flop 8, 0-5.5 V input voltage range, captured to Q8 on positive CLK transition.
10 GND power_in Ground reference; ±100 mA maximum continuous current through VCC or GND.
11 CLK input Clock input, positive edge-triggered, 0-5.5 V input voltage range, 150 MHz maximum frequency at 3.3 V.
12 8Q tri_state Three-state data output for flip-flop 8; high-impedance when OE is high, normal logic drive when OE is low.
13 7Q tri_state Three-state data output for flip-flop 7; high-impedance when OE is high, normal logic drive when OE is low.
14 6Q tri_state Three-state data output for flip-flop 6; high-impedance when OE is high, normal logic drive when OE is low.
15 5Q tri_state Three-state data output for flip-flop 5; high-impedance when OE is high, normal logic drive when OE is low.
16 4Q tri_state Three-state data output for flip-flop 4; high-impedance when OE is high, normal logic drive when OE is low.
17 3Q tri_state Three-state data output for flip-flop 3; high-impedance when OE is high, normal logic drive when OE is low.
18 2Q tri_state Three-state data output for flip-flop 2; high-impedance when OE is high, normal logic drive when OE is low.
19 1Q tri_state Three-state data output for flip-flop 1; high-impedance when OE is high, normal logic drive when OE is low.
20 VCC power_in Supply voltage input; recommended operating range 1.65 V to 3.6 V for SN74LVC574A.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-20-300mil
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: SN74LVC574ADWR
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
  • 3D model files: sn74lvc574adwr-etched.step / sn74lvc574adwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvc574adwr.step / sn74lvc574adwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (32 pp, sha256 a7d4ff611403d78f, retrieved 2026-09-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF