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SN74HCT574PWR

Public Unreviewed

by Ray

Texas Instruments Flip Flops, TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

Schematic Symbol

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PCB Footprint

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Datasheet

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Contents

README

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SN74HCT574PWR

Texas Instruments · Flip Flops · TSSOP-20

SN74HCT574PWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE input Active-low output enable. When low, the eight Q outputs are driven; when high, all outputs are placed in high-impedance state. Does not affect the internal flip-flop state.
2 1D input Data input to flip-flop 1. Latched into the register on the rising edge of CLK. TTL-compatible input, 1 µA max leakage.
3 2D input Data input to flip-flop 2. Latched on rising edge of CLK.
4 3D input Data input to flip-flop 3. Latched on rising edge of CLK.
5 4D input Data input to flip-flop 4. Latched on rising edge of CLK.
6 5D input Data input to flip-flop 5. Latched on rising edge of CLK.
7 6D input Data input to flip-flop 6. Latched on rising edge of CLK.
8 7D input Data input to flip-flop 7. Latched on rising edge of CLK.
9 8D input Data input to flip-flop 8. Latched on rising edge of CLK.
10 GND power_in Ground reference (0 V). Connect to system ground.
11 CLK input Clock input. Data on the D inputs is transferred to the corresponding Q outputs on the low-to-high transition. Max clock frequency 20 MHz min / 24 MHz min at Vcc=4.5V / 5.5V respectively.
12 8Q tri_state 3-state output of flip-flop 8. Follows latched value of 8D when OE is low; high-impedance when OE is high. ±6 mA drive at 5 V.
13 7Q tri_state 3-state output of flip-flop 7. Driven when OE is low; Hi-Z when OE is high.
14 6Q tri_state 3-state output of flip-flop 6. Driven when OE is low; Hi-Z when OE is high.
15 5Q tri_state 3-state output of flip-flop 5. Driven when OE is low; Hi-Z when OE is high.
16 4Q tri_state 3-state output of flip-flop 4. Driven when OE is low; Hi-Z when OE is high.
17 3Q tri_state 3-state output of flip-flop 3. Driven when OE is low; Hi-Z when OE is high.
18 2Q tri_state 3-state output of flip-flop 2. Driven when OE is low; Hi-Z when OE is high.
19 1Q tri_state 3-state output of flip-flop 1. Driven when OE is low; Hi-Z when OE is high.
20 VCC power_in Supply voltage input, 4.5 V to 5.5 V recommended (7 V abs max). Decouple with a 0.1 µF ceramic capacitor close to the pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Logic
Pins 20

Ordering variants

Same part, different packaging or reel option.

  • SN74HCT574PWR
  • SN74HCT574PWRDGS
  • SN74HCT574PWRDGSR
  • SN74HCT574PWRDW
  • SN74HCT574PWRDWR
  • SN74HCT574PWRDB
  • SN74HCT574PWRDBR
  • SN74HCT574PWRN
  • SN74HCT574PWRNS
  • SN74HCT574PWRNSR
  • SN74HCT574PWRFK

CAD (KiCad official)

  • Symbol: SN74HCT574PWR
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
sn74hct574pwr.step 267 KB You want the bare part, or you mark your own boards.
sn74hct574pwr-etched.step 2.8 MB You want the part with SN74HCT574PWR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 714 faces against 327 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (30 pp, sha256 741ea0d0fbeb1d5c, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF