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Pinout
Key specifications
Ordering variants
CAD (KiCad official)
Provenance

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SN74HCT541PWR

Texas Instruments · Buffer/Driver/Transceiver · TSSOP-20

SN74HCT541PWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	OE1	input	Output-enable 1 (active LOW). Both OE1 and OE2 must be LOW to enable the eight Y outputs; if either OE input is HIGH, all outputs are in the high-impedance (Hi-Z) state. TTL-compatible input (VIH ≥ 2 V, VIL ≤ 0.8 V).
2	A1	input	Buffer channel 1 data input. TTL-compatible (VIH ≥ 2 V, VIL ≤ 0.8 V). Passes non-inverted to Y1 when both OE inputs are LOW; must not be left floating.
3	A2	input	Buffer channel 2 data input. TTL-compatible; drives Y2 non-inverted when enabled.
4	A3	input	Buffer channel 3 data input. TTL-compatible; drives Y3 non-inverted when enabled.
5	A4	input	Buffer channel 4 data input. TTL-compatible; drives Y4 non-inverted when enabled.
6	A5	input	Buffer channel 5 data input. TTL-compatible; drives Y5 non-inverted when enabled.
7	A6	input	Buffer channel 6 data input. TTL-compatible; drives Y6 non-inverted when enabled.
8	A7	input	Buffer channel 7 data input. TTL-compatible; drives Y7 non-inverted when enabled.
9	A8	input	Buffer channel 8 data input. TTL-compatible; drives Y8 non-inverted when enabled.
10	GND	power_in	Device ground (0 V) reference. Continuous current through GND is limited to ±70 mA per Absolute Maximum Ratings.
11	Y8	tri_state	3-state buffer output for channel 8. Follows A8 when both OE inputs are LOW; otherwise Hi-Z. Rated ±6 mA drive at VCC = 5 V; can drive up to 15 LSTTL loads.
12	Y7	tri_state	3-state buffer output for channel 7. Follows A7 when enabled; Hi-Z when either OE is HIGH. ±6 mA drive at 5 V.
13	Y6	tri_state	3-state buffer output for channel 6. Follows A6 when enabled; Hi-Z when either OE is HIGH.
14	Y5	tri_state	3-state buffer output for channel 5. Follows A5 when enabled; Hi-Z when either OE is HIGH.
15	Y4	tri_state	3-state buffer output for channel 4. Follows A4 when enabled; Hi-Z when either OE is HIGH.
16	Y3	tri_state	3-state buffer output for channel 3. Follows A3 when enabled; Hi-Z when either OE is HIGH.
17	Y2	tri_state	3-state buffer output for channel 2. Follows A2 when enabled; Hi-Z when either OE is HIGH.
18	Y1	tri_state	3-state buffer output for channel 1. Follows A1 when both OE inputs are LOW; Hi-Z otherwise. ±6 mA drive at 5 V.
19	OE2	input	Output-enable 2 (active LOW). Combined with OE1 in a 2-input NOR: both OE1 and OE2 must be LOW to enable the Y outputs; if either is HIGH, all eight outputs are in Hi-Z.
20	VCC	power_in	Positive supply. Recommended operating range 4.5 V to 5.5 V (absolute max -0.5 V to 7 V). Bypass with a 0.1 µF ceramic close to the pin; typical ICC ≤ 80 µA (SN74HCT541) with static CMOS inputs.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	TSSOP-20
Category	Logic
Pins	20

Ordering variants

SN74HCT541PWR
SN74HCT541PWRG4
SN74HCT541PWRPWT
SN74HCT541PWRDW
SN74HCT541PWRDWR
SN74HCT541PWRDWRE4
SN74HCT541PWRDWRG4
SN74HCT541PWRDB
SN74HCT541PWRDBR
SN74HCT541PWRN
SN74HCT541PWRNS
SN74HCT541PWRNSR
SN74HCT541PWRNSRE4
SN74HCT541PWRNSRG4
SN74HCT541PWRJ
SN74HCT541PWRFK

CAD (KiCad official)

Symbol: SN74HCT541PWR
Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
3D model: TSSOP-20 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (None pp, sha256 5750f30139a6a6a5, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

Symbol & Footprint

Schematic Symbol

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