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sn74hcs74dr

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by Ray

Texas Instruments Flip Flops, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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SN74HCS74DR

Texas Instruments · Flip Flops · SOIC-14

SN74HCS74DR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1CLR input Clear input for flip-flop channel 1, active low. Asynchronously forces 1Q low regardless of clock, data, or preset state.
2 1D input Data input for flip-flop channel 1. Sampled on the rising edge of 1CLK when preset and clear are both inactive (high).
3 1CLK input Clock input for flip-flop channel 1. Rising-edge triggered; input D is transferred to 1Q on the positive-going clock edge.
4 1PRE input Preset input for flip-flop channel 1, active low. Asynchronously forces 1Q high regardless of clock, data, or clear state.
5 1Q output True (non-inverted) output for flip-flop channel 1. Push-pull CMOS output; drives up to ±7.8 mA at VCC = 6 V.
6 1Q_N output Inverted (complement) output for flip-flop channel 1. Push-pull CMOS output; drives up to ±7.8 mA at VCC = 6 V.
7 GND power_in Device ground reference (0 V). Return path for both supply and output currents.
8 2Q_N output Inverted (complement) output for flip-flop channel 2. Push-pull CMOS output; drives up to ±7.8 mA at VCC = 6 V.
9 2Q output True (non-inverted) output for flip-flop channel 2. Push-pull CMOS output; drives up to ±7.8 mA at VCC = 6 V.
10 2PRE input Preset input for flip-flop channel 2, active low. Asynchronously forces 2Q high regardless of clock, data, or clear state.
11 2CLK input Clock input for flip-flop channel 2. Rising-edge triggered; input D is transferred to 2Q on the positive-going clock edge.
12 2D input Data input for flip-flop channel 2. Sampled on the rising edge of 2CLK when preset and clear are both inactive (high).
13 2CLR input Clear input for flip-flop channel 2, active low. Asynchronously forces 2Q low regardless of clock, data, or preset state.
14 VCC power_in Positive supply input. Recommended operating range 2 V to 6 V (absolute maximum 7 V). Bypass with a 0.1 µF ceramic capacitor close to the pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Logic
Pins 14

Ordering variants

  • SN74HCS74DRD
  • SN74HCS74DR
  • SN74HCS74DRPW
  • SN74HCS74DRPWR
  • SN74HCS74DRBQA
  • SN74HCS74DRBQAR
  • SN74HCS74DRDYY
  • SN74HCS74DRDYYR

CAD (KiCad official)

  • Symbol: SN74HCS74DR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (None pp, sha256 3ea07ee8f5550bb8, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

Symbol & Footprint

Schematic Symbol

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PCB Footprint

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