Loads on click. Unloads when scrolled away or the tab is hidden.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads when scrolled away or the tab is hidden.

PCB Footprint

Open full view ↗
Loads on click. Unloads when scrolled away or the tab is hidden.
Loads on click. Unloads when scrolled away or the tab is hidden.
Download PDF
Contents

README

markdown

SN74HCS365QDRQ1

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SOIC-16

SN74HCS365QDRQ1 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE1 input Output Enable 1, active low. When OE1 is high, all six Y outputs enter high-impedance (3-state). Schmitt-trigger input; tolerates slow/noisy signals.
2 A1 input Channel 1 buffer input. Schmitt-trigger CMOS input, VIH/VIL set by VCC (VT+ typ 2.1 V, VT- typ 1.2 V at VCC=6 V).
3 Y1 tri_state Channel 1 buffered output. Non-inverting buffer of A1. Enabled when both OE1 and OE2 are low; otherwise Hi-Z. Output drive ±7.8 mA at VCC=6 V.
4 A2 input Channel 2 buffer input. Schmitt-trigger CMOS input.
5 Y2 tri_state Channel 2 buffered output. Non-inverting buffer of A2. Hi-Z when OE1 or OE2 is high.
6 A3 input Channel 3 buffer input. Schmitt-trigger CMOS input.
7 Y3 tri_state Channel 3 buffered output. Non-inverting buffer of A3. Hi-Z when OE1 or OE2 is high.
8 GND power_in Ground reference (0 V). Return for supply current (ICC typ 100 nA) and output currents.
9 Y4 tri_state Channel 4 buffered output. Non-inverting buffer of A4. Hi-Z when OE1 or OE2 is high.
10 A4 input Channel 4 buffer input. Schmitt-trigger CMOS input.
11 Y5 tri_state Channel 5 buffered output. Non-inverting buffer of A5. Hi-Z when OE1 or OE2 is high.
12 A5 input Channel 5 buffer input. Schmitt-trigger CMOS input.
13 Y6 tri_state Channel 6 buffered output. Non-inverting buffer of A6. Hi-Z when OE1 or OE2 is high.
14 A6 input Channel 6 buffer input. Schmitt-trigger CMOS input.
15 OE2 input Output Enable 2, active low. When OE2 is high, all six Y outputs enter high-impedance (3-state). Schmitt-trigger input.
16 VCC power_in Positive supply, 2 V to 6 V recommended (7 V absolute max). Quiescent current ICC typ 100 nA. Decouple with a 0.1 µF ceramic to GND close to the pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16
Category Logic
Pins 16

Ordering variants

Same part, different packaging or reel option.

  • SN74HCS365QDRQ1
  • SN74HCS365QDRQ1D
  • SN74HCS365QDRQ1PWR
  • SN74HCS365QDRQ1PW
  • SN74HCS365QDRQ1WBQB

CAD (KiCad official)

  • Symbol: SN74HCS365QDRQ1
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (None pp, sha256 a07d41e8d78266fd, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF