SN74HCS165PWR
Public Unreviewedby Ray
Texas Instruments Shifting Register, TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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README
markdownSN74HCS165PWR
Texas Instruments · Shifting Register · TSSOP-16
SN74HCS165PWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SH/LD | input | Shift/Load control. When high, the register shifts serial data on rising CLK edges. When low, the eight parallel inputs A-H are loaded into the register. |
| 2 | CLK | input | Clock input, rising-edge triggered. Advances the shift register when SH/LD is high and CLK INH is low. Schmitt-trigger input. |
| 3 | E | input | Parallel data input E. Loaded into the shift register when SH/LD is low. |
| 4 | F | input | Parallel data input F. Loaded into the shift register when SH/LD is low. |
| 5 | G | input | Parallel data input G. Loaded into the shift register when SH/LD is low. |
| 6 | H | input | Parallel data input H (LSB of parallel word feeding the serial output stage). Loaded into the shift register when SH/LD is low. |
| 7 | QH_bar | output | Inverted serial output. Complement of the QH serial output. Drives 7.8 mA at Vcc = 6 V. |
| 8 | GND | power_in | Ground reference (0 V). Return for supply and I/O currents. |
| 9 | QH | output | Serial data output from the final (H) stage of the 8-bit shift register. Drives 7.8 mA at Vcc = 6 V. |
| 10 | SER | input | Serial data input. Data present on SER is clocked into the first stage on the rising edge of CLK when SH/LD is high. |
| 11 | A | input | Parallel data input A (first stage). Loaded into the shift register when SH/LD is low. |
| 12 | B | input | Parallel data input B. Loaded into the shift register when SH/LD is low. |
| 13 | C | input | Parallel data input C. Loaded into the shift register when SH/LD is low. |
| 14 | D | input | Parallel data input D. Loaded into the shift register when SH/LD is low. |
| 15 | CLK INH | input | Clock inhibit. When high, disables the clock (rising edges on CLK are ignored and the shift register holds its state). When low, CLK is allowed to advance the register. |
| 16 | VCC | power_in | Positive supply voltage. Recommended operating range 2 V to 6 V (5 V nominal). Absolute maximum 7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Logic |
| Pins | 16 |
Ordering variants
Same part, different packaging or reel option.
SN74HCS165PWRSN74HCS165PWRDSN74HCS165PWRDRSN74HCS165PWRBQBSN74HCS165PWRDYY
CAD (KiCad official)
- Symbol:
SN74HCS165PWR - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
sn74hcs165pwr.step |
205 KB | You want the bare part, or you mark your own boards. |
sn74hcs165pwr-etched.step |
2.9 MB | You want the part with SN74HCS165PWR already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 720 faces against 255 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (35 pp, sha256
98d7d75c9269aee1, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).