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Pinout
Key specifications
Ordering variants
CAD (KiCad official)
Provenance

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SN74HC541DWR

Texas Instruments · Buffer/Driver/Transceiver · SOIC-20-300mil

SN74HC541DWR from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	OE1	input	Active-low output-enable 1. When both OE1 and OE2 are low, the eight Y outputs follow the A inputs; if OE1 is high, all outputs go to the high-impedance (3-state) state. Input current 1 µA max, VIH/VIL scale with VCC (2-6 V).
2	A1	input	Buffer channel 1 data input. Non-inverting; when the device is enabled the logic level on A1 is driven onto Y1 (pin 18). CMOS input, 1 µA max leakage.
3	A2	input	Buffer channel 2 data input. Non-inverting; when enabled, drives Y2 (pin 17).
4	A3	input	Buffer channel 3 data input. Non-inverting; when enabled, drives Y3 (pin 16).
5	A4	input	Buffer channel 4 data input. Non-inverting; when enabled, drives Y4 (pin 15).
6	A5	input	Buffer channel 5 data input. Non-inverting; when enabled, drives Y5 (pin 14).
7	A6	input	Buffer channel 6 data input. Non-inverting; when enabled, drives Y6 (pin 13).
8	A7	input	Buffer channel 7 data input. Non-inverting; when enabled, drives Y7 (pin 12).
9	A8	input	Buffer channel 8 data input. Non-inverting; when enabled, drives Y8 (pin 11).
10	GND	power_in	Ground reference (0 V) for the device. Must be tied to system ground. Continuous current through GND is rated ±70 mA (absolute max).
11	Y8	tri_state	3-state buffer output for channel 8 (mirrors A8, pin 9, when both OE1 and OE2 are low; Hi-Z otherwise). Rated ±6 mA drive at VCC = 5 V.
12	Y7	tri_state	3-state buffer output for channel 7 (mirrors A7, pin 8, when enabled; Hi-Z otherwise). ±6 mA drive at 5 V.
13	Y6	tri_state	3-state buffer output for channel 6 (mirrors A6, pin 7, when enabled; Hi-Z otherwise). ±6 mA drive at 5 V.
14	Y5	tri_state	3-state buffer output for channel 5 (mirrors A5, pin 6, when enabled; Hi-Z otherwise). ±6 mA drive at 5 V.
15	Y4	tri_state	3-state buffer output for channel 4 (mirrors A4, pin 5, when enabled; Hi-Z otherwise). ±6 mA drive at 5 V.
16	Y3	tri_state	3-state buffer output for channel 3 (mirrors A3, pin 4, when enabled; Hi-Z otherwise). ±6 mA drive at 5 V.
17	Y2	tri_state	3-state buffer output for channel 2 (mirrors A2, pin 3, when enabled; Hi-Z otherwise). ±6 mA drive at 5 V.
18	Y1	tri_state	3-state buffer output for channel 1 (mirrors A1, pin 2, when enabled; Hi-Z otherwise). ±6 mA drive at 5 V.
19	OE2	input	Active-low output-enable 2. ORed with OE1 through an internal NOR: both must be low to enable the eight Y outputs; if OE2 is high, all outputs go to Hi-Z.
20	VCC	power_in	Positive supply voltage, 2 V to 6 V (5 V nominal). ICC = 80 µA max at VCC = 6 V. Decouple locally with a 0.1 µF ceramic to GND.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-20-300mil
Category	Logic
Pins	20

Ordering variants

SN74HC541DWR
SN74HC541DWRDWE4
SN74HC541DWRDWG4
SN74HC541DWRE4
SN74HC541DWRG4
SN74HC541DWRDBR
SN74HC541DWRPW
SN74HC541DWRPWR
SN74HC541DWRPWT
SN74HC541DWRPWG4
SN74HC541DWRPWRG4
SN74HC541DWRN
SN74HC541DWRNE4
SN74HC541DWRNSR
SN74HC541DWRJ
SN74HC541DWRSNJ54HC541J
SN74HC541DWRJM38510/65711BRA
SN74HC541DWRW
SN74HC541DWRSNJ54HC541W
SN74HC541DWRFK
SN74HC541DWRSNJ54HC541FK

CAD (KiCad official)

Symbol: SN74HC541DWR
Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
3D model: SOIC-20-300mil (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (None pp, sha256 a3a30a2a11694cde, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

Symbol & Footprint

Schematic Symbol

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