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Contents

README

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SN74HC244PWR

Texas Instruments · Buffer/Driver/Transceiver · TSSOP-20

SN74HC244PWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Active-low output enable for the first 4-bit buffer group (1Y1-1Y4). When low, 1A inputs are passed to 1Y outputs; when high, 1Y outputs are placed in the high-impedance (3-state) state.
2 1A1 input Data input 1 of the first 4-bit buffer group. Non-inverting path to 1Y1 when 1OE is asserted low. CMOS input, VIH ≥ 3.15V at VCC=4.5V.
3 2Y4 tri_state Data output 4 of the second 4-bit buffer group. Driven by 2A4 when 2OE is low; high-Z when 2OE is high. ±6mA drive at VCC=5V.
4 1A2 input Data input 2 of the first 4-bit buffer group. Non-inverting path to 1Y2 when 1OE is asserted low.
5 2Y3 tri_state Data output 3 of the second 4-bit buffer group. Driven by 2A3 when 2OE is low; high-Z otherwise.
6 1A3 input Data input 3 of the first 4-bit buffer group. Non-inverting path to 1Y3 when 1OE is asserted low.
7 2Y2 tri_state Data output 2 of the second 4-bit buffer group. Driven by 2A2 when 2OE is low; high-Z otherwise.
8 1A4 input Data input 4 of the first 4-bit buffer group. Non-inverting path to 1Y4 when 1OE is asserted low.
9 2Y1 tri_state Data output 1 of the second 4-bit buffer group. Driven by 2A1 when 2OE is low; high-Z otherwise.
10 GND power_in Device ground reference (0V). Connect directly to system ground plane.
11 2A1 input Data input 1 of the second 4-bit buffer group. Non-inverting path to 2Y1 when 2OE is asserted low.
12 1Y4 tri_state Data output 4 of the first 4-bit buffer group. Driven by 1A4 when 1OE is low; high-Z otherwise. ±6mA drive at VCC=5V.
13 2A2 input Data input 2 of the second 4-bit buffer group. Non-inverting path to 2Y2 when 2OE is asserted low.
14 1Y3 tri_state Data output 3 of the first 4-bit buffer group. Driven by 1A3 when 1OE is low; high-Z otherwise.
15 2A3 input Data input 3 of the second 4-bit buffer group. Non-inverting path to 2Y3 when 2OE is asserted low.
16 1Y2 tri_state Data output 2 of the first 4-bit buffer group. Driven by 1A2 when 1OE is low; high-Z otherwise.
17 2A4 input Data input 4 of the second 4-bit buffer group. Non-inverting path to 2Y4 when 2OE is asserted low.
18 1Y1 tri_state Data output 1 of the first 4-bit buffer group. Driven by 1A1 when 1OE is low; high-Z otherwise.
19 2OE input Active-low output enable for the second 4-bit buffer group (2Y1-2Y4). When low, 2A inputs are passed to 2Y outputs; when high, 2Y outputs are placed in the high-impedance state.
20 VCC power_in Positive supply. Recommended range 2V to 6V (nominal 5V); absolute max 7V. Decouple with 100nF ceramic to GND close to the pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Logic
Pins 20

Ordering variants

Same part, different packaging or reel option.

  • SN74HC244PWR
  • SN74HC244PWRDB
  • SN74HC244PWRDBR
  • SN74HC244PWRDW
  • SN74HC244PWRDWR
  • SN74HC244PWRN
  • SN74HC244PWRNS
  • SN74HC244PWRNSR
  • SN74HC244PWRFK
  • SN74HC244PWRJ
  • SN74HC244PWRW

CAD (KiCad official)

  • Symbol: SN74HC244PWR
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (42 pp, sha256 89be5869d39fe0cb, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF