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sn74hc164n

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by Ray

Texas Instruments Shifting Register, DIP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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README

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SN74HC164N

Texas Instruments · Shifting Register · DIP-14

SN74HC164N from Texas Instruments, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Gated serial data input 1. AND-gated with input B to feed the first flip-flop; a low on either A or B forces the first stage low on the next CLK rising edge. Fully buffered CMOS input.
2 B input Gated serial data input 2. AND-gated with input A; a low on either input inhibits new data entry. Fully buffered CMOS input.
3 QA output Parallel output bit A (first stage of the shift register). Push-pull CMOS output, ±4 mA drive at VCC = 5 V; can drive up to 10 LSTTL loads.
4 QB output Parallel output bit B (second stage of the shift register). Push-pull CMOS output, ±4 mA drive at VCC = 5 V.
5 QC output Parallel output bit C (third stage of the shift register). Push-pull CMOS output, ±4 mA drive at VCC = 5 V.
6 QD output Parallel output bit D (fourth stage of the shift register). Push-pull CMOS output, ±4 mA drive at VCC = 5 V.
7 GND power_in Ground reference (0 V) for the device.
8 CLK input Clock input. Data is captured and shifted on the low-to-high (rising) transition of CLK. Fully buffered CMOS input; fmax = 31 MHz typ at VCC = 4.5 V.
9 CLR input Asynchronous clear, active-low. Driving CLR low forces all eight Q outputs to logic 0 independently of CLK. Fully buffered CMOS input.
10 QE output Parallel output bit E (fifth stage of the shift register). Push-pull CMOS output, ±4 mA drive at VCC = 5 V.
11 QF output Parallel output bit F (sixth stage of the shift register). Push-pull CMOS output, ±4 mA drive at VCC = 5 V.
12 QG output Parallel output bit G (seventh stage of the shift register). Push-pull CMOS output, ±4 mA drive at VCC = 5 V.
13 QH output Parallel output bit H (eighth/last stage of the shift register); also usable as serial data output for cascading. Push-pull CMOS output, ±4 mA drive at VCC = 5 V.
14 VCC power_in Positive supply voltage, 2 V to 6 V recommended (5 V nominal). Bypass with a 0.1 µF ceramic capacitor placed close to the pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package DIP-14
Category Logic
Pins 14

Ordering variants

  • SN74HC164NN
  • SN74HC164NNE4
  • SN74HC164ND
  • SN74HC164NDR
  • SN74HC164NDT
  • SN74HC164NDE4
  • SN74HC164NDG4
  • SN74HC164NDRG3
  • SN74HC164NDRG4
  • SN74HC164NNS
  • SN74HC164NNSR
  • SN74HC164NPW
  • SN74HC164NPWR
  • SN74HC164NPWT
  • SN74HC164NPWG4
  • SN74HC164NPWRE4
  • SN74HC164NPWRG4
  • SN74HC164NPWTG4
  • SN74HC164NJ
  • SN74HC164NW
  • SN74HC164NFK

CAD (KiCad official)

  • Symbol: SN74HC164N
  • Footprint: Package_DIP:DIP-14_W7.62mm
  • 3D model: DIP-14 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (None pp, sha256 58bb71c54d54aa5e, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

Symbol & Footprint

Schematic Symbol

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Datasheet

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