SN74HC164DTR from XBLW, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	DSA	input	Serial data input A. AND-gated with DSB; either input can be used as an active-HIGH enable for data entry through the other input. Sampled on the LOW-to-HIGH transition of CP.
2	DSB	input	Serial data input B. AND-gated with DSA; either input can be used as an active-HIGH enable for data entry through the other input. Sampled on the LOW-to-HIGH transition of CP.
3	Q0	output	Parallel data output, bit 0 (first stage of the shift register). Drives ±4.0 mA at Vcc=4.5 V / ±5.2 mA at Vcc=6.0 V.
4	Q1	output	Parallel data output, bit 1. Drives ±4.0 mA at Vcc=4.5 V / ±5.2 mA at Vcc=6.0 V.
5	Q2	output	Parallel data output, bit 2. Drives ±4.0 mA at Vcc=4.5 V / ±5.2 mA at Vcc=6.0 V.
6	Q3	output	Parallel data output, bit 3. Drives ±4.0 mA at Vcc=4.5 V / ±5.2 mA at Vcc=6.0 V.
7	GND	power_in	Ground reference (0 V).
8	CP	input	Clock input; positive-edge triggered. Data is shifted on the LOW-to-HIGH transition. Max clock frequency 78 MHz typ at Vcc=5.0 V (CL=15 pF).
9	MR	input	Master reset input, active LOW (asynchronous). A LOW clears all internal flip-flops and forces Q0-Q7 LOW independently of CP and the data inputs.
10	Q4	output	Parallel data output, bit 4. Drives ±4.0 mA at Vcc=4.5 V / ±5.2 mA at Vcc=6.0 V.
11	Q5	output	Parallel data output, bit 5. Drives ±4.0 mA at Vcc=4.5 V / ±5.2 mA at Vcc=6.0 V.
12	Q6	output	Parallel data output, bit 6. Drives ±4.0 mA at Vcc=4.5 V / ±5.2 mA at Vcc=6.0 V.
13	Q7	output	Parallel data output, bit 7 (last stage of the shift register; typical serial-cascade tap).
14	VCC	power_in	Positive supply voltage. Recommended range 2.0 V-6.0 V (typ 5.0 V); absolute max 7 V.

Key specifications

Parameter	Value
Manufacturer	XBLW
Package	SOP-14
Category	Logic
Pins	14

Ordering variants

Same part, different packaging or reel option.

SN74HC164DTR
SN74HC164DTRTDTR
SN74HC164DTRN

CAD (KiCad official)

Symbol: SN74HC164DTR
Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
3D model: SOP-14 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`sn74hc164dtr.step`	195 KB	You want the bare part, or you mark your own boards.
`sn74hc164dtr-etched.step`	2.4 MB	You want the part with `SN74HC164DTR` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 618 faces against 237 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: XBLW datasheet (18 pp, sha256 2fd08237d66b4f61, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF