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SN74HC161PWR

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by Ray

Texas Instruments Counters / Dividers, TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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PCB Footprint

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Datasheet

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Contents

README

markdown

SN74HC161PWR

Texas Instruments · Counters / Dividers · TSSOP-16

SN74HC161PWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CLR input Asynchronous clear (active-low). A low level forces all four flip-flop outputs (QA-QD) low regardless of the states of CLK, LOAD, or the enable inputs.
2 CLK input Clock input. Rising (positive-going) edge triggers the four internal D/T flip-flops. Buffered input.
3 A input Parallel data input A (bit 0, LSB) for synchronous preset loading. Loaded into QA on the next rising CLK edge when LOAD is low.
4 B input Parallel data input B (bit 1) for synchronous preset loading. Loaded into QB on the next rising CLK edge when LOAD is low.
5 C input Parallel data input C (bit 2) for synchronous preset loading. Loaded into QC on the next rising CLK edge when LOAD is low.
6 D input Parallel data input D (bit 3, MSB) for synchronous preset loading. Loaded into QD on the next rising CLK edge when LOAD is low.
7 ENP input Count-enable P input (active-high). Must be high together with ENT to allow the counter to advance on rising CLK edges.
8 GND power_in Ground reference (0 V). Return for VCC.
9 LOAD input Synchronous parallel-load enable (active-low). A low level disables counting and causes QA-QD to take the values on A-D on the next rising CLK edge.
10 ENT input Count-enable T input (active-high). Must be high together with ENP to enable counting; ENT is also fed forward to gate the RCO output.
11 QD output Counter output QD (bit 3, MSB). Push-pull CMOS output, ±4 mA drive at 5 V, capable of driving up to 10 LSTTL loads.
12 QC output Counter output QC (bit 2). Push-pull CMOS output, ±4 mA drive at 5 V.
13 QB output Counter output QB (bit 1). Push-pull CMOS output, ±4 mA drive at 5 V.
14 QA output Counter output QA (bit 0, LSB). Push-pull CMOS output, ±4 mA drive at 5 V.
15 RCO output Ripple-carry output. Produces a high-level pulse (one CLK period wide) when the counter reaches terminal count (15 with QA high) and ENT is high. Used to cascade counters for n-bit synchronous operation.
16 VCC power_in Positive supply voltage, 2 V to 6 V operating range. Bypass with a 0.1 uF ceramic capacitor to GND close to the pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Logic
Pins 16

Ordering variants

Same part, different packaging or reel option.

  • SN74HC161PWR
  • SN74HC161PWRPWT
  • SN74HC161PWRN
  • SN74HC161PWRD
  • SN74HC161PWRDR
  • SN74HC161PWRDT
  • SN74HC161PWRNSR
  • SN74HC161PWRJ
  • SN74HC161PWRW
  • SN74HC161PWRFK

CAD (KiCad official)

  • Symbol: SN74HC161PWR
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
sn74hc161pwr.step 205 KB You want the bare part, or you mark your own boards.
sn74hc161pwr-etched.step 2.5 MB You want the part with SN74HC161PWR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 639 faces against 255 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (31 pp, sha256 58fced3e842dd1c0, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF