component
sn74hc125dr
Public Unreviewedby Ray
Texas Instruments Buffer/Driver/Transceiver, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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README
markdownSN74HC125DR
Texas Instruments · Buffer/Driver/Transceiver · SOIC-14
SN74HC125DR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Channel 1 output enable, active low. When 1OE is low, buffer 1 drives 1Y = 1A; when 1OE is high, 1Y is placed in high-impedance (3-state). |
| 2 | 1A | input | Channel 1 buffer data input. CMOS-level input with VIH/VIL scaling with VCC (e.g. VIH ≥ 3.15 V at VCC = 4.5 V). |
| 3 | 1Y | tri_state | Channel 1 buffered output. Follows 1A when 1OE is low; high-impedance when 1OE is high. Rated to drive up to 10 LSTTL loads. |
| 4 | 2OE | input | Channel 2 output enable, active low. When 2OE is low, buffer 2 drives 2Y = 2A; when 2OE is high, 2Y is placed in high-impedance (3-state). |
| 5 | 2A | input | Channel 2 buffer data input. CMOS-level input scaled to VCC. |
| 6 | 2Y | tri_state | Channel 2 buffered output. Follows 2A when 2OE is low; high-impedance when 2OE is high. |
| 7 | GND | power_in | Ground reference. Tie to system 0 V. |
| 8 | 3Y | tri_state | Channel 3 buffered output. Follows 3A when 3OE is low; high-impedance when 3OE is high. |
| 9 | 3A | input | Channel 3 buffer data input. CMOS-level input scaled to VCC. |
| 10 | 3OE | input | Channel 3 output enable, active low. When 3OE is low, buffer 3 drives 3Y = 3A; when 3OE is high, 3Y is placed in high-impedance (3-state). |
| 11 | 4Y | tri_state | Channel 4 buffered output. Follows 4A when 4OE is low; high-impedance when 4OE is high. |
| 12 | 4A | input | Channel 4 buffer data input. CMOS-level input scaled to VCC. |
| 13 | 4OE | input | Channel 4 output enable, active low. When 4OE is low, buffer 4 drives 4Y = 4A; when 4OE is high, 4Y is placed in high-impedance (3-state). |
| 14 | VCC | power_in | Positive supply, 2 V to 6 V (5 V nominal). Bypass locally with a 0.1 µF ceramic capacitor to GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
Ordering variants
SN74HC125DRDSN74HC125DRSN74HC125DRDBSN74HC125DRNSN74HC125DRNSSN74HC125DRPWSN74HC125DRJSN74HC125DRFK
CAD (KiCad official)
- Symbol:
SN74HC125DR - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (None pp, sha256
c21649cccf953ad9, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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