component
SN74ALS30ADR
Public Unreviewedby Ray
Texas Instruments Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74ALS30ADR
Texas Instruments · Gates · SOIC-14
SN74ALS30ADR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | input | Logic input A of the 8-input NAND gate. TTL input threshold VIH ≥ 2 V, VIL ≤ 0.8 V. IIH = 20 µA max at VI = 2.7 V, IIL = -0.1 mA max at VI = 0.4 V. |
| 2 | B | input | Logic input B of the 8-input NAND gate. TTL input, same electrical characteristics as A. |
| 3 | C | input | Logic input C of the 8-input NAND gate. TTL input, same electrical characteristics as A. |
| 4 | D | input | Logic input D of the 8-input NAND gate. TTL input, same electrical characteristics as A. |
| 5 | E | input | Logic input E of the 8-input NAND gate. TTL input, same electrical characteristics as A. |
| 6 | F | input | Logic input F of the 8-input NAND gate. TTL input, same electrical characteristics as A. |
| 7 | GND | power_in | Device ground reference (0 V). All logic levels are referred to this pin. |
| 8 | Y | output | NAND gate output. Y = NOT(A·B·C·D·E·F·G·H). Totem-pole TTL output; VOH ≥ VCC − 2 V at IOH = -0.4 mA, VOL ≤ 0.4 V at IOL = 8 mA (SN74ALS30A). |
| 9 | NC | unconnected | No internal connection. Leave floating or tie to any voltage within the absolute-maximum range. |
| 10 | NC | unconnected | No internal connection. |
| 11 | G | input | Logic input G of the 8-input NAND gate. TTL input, same electrical characteristics as A. |
| 12 | H | input | Logic input H of the 8-input NAND gate. TTL input, same electrical characteristics as A. |
| 13 | NC | unconnected | No internal connection. |
| 14 | VCC | power_in | Positive supply rail. Recommended VCC = 4.5-5.5 V (5 V nominal). Absolute maximum -0.5 V to 7 V. Bypass with a 100 nF ceramic capacitor to GND close to the pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
Ordering variants
Same part, different packaging or reel option.
SN74ALS30ADRDSN74ALS30ADRSN74ALS30ADRNSN74ALS30ADRDBSN74ALS30ADRDBRSN74ALS30ADRJSN74ALS30ADRFK
CAD (KiCad official)
- Symbol:
SN74ALS30ADR - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (25 pp, sha256
82fd45a1afea3897, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).