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SN65LVDT41PWR

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by Ray

Texas Instruments LVDS ICs, TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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Contents

README

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SN65LVDT41PWR

Texas Instruments · LVDS ICs · TSSOP-20

SN65LVDT41PWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1D input LVTTL driver input pin for channel 1. Drives the differential LVDS driver output pair 1Y/1Z.
2 GND power_in Ground reference pin. All device voltages referenced to this net.
3 2D input LVTTL driver input pin for channel 2. Drives the differential LVDS driver output pair 2Y/2Z.
4 VCC power_in Power supply pin, +3.3 V ±0.3 V (3.0 V to 3.6 V recommended operating range).
5 3D input LVTTL driver input pin for channel 3. Drives the differential LVDS driver output pair 3Y/3Z.
6 GND power_in Ground reference pin. All device voltages referenced to this net.
7 4D input LVTTL driver input pin for channel 4. Drives the differential LVDS driver output pair 4Y/4Z.
8 VCC power_in Power supply pin, +3.3 V ±0.3 V (3.0 V to 3.6 V recommended operating range).
9 5R output LVTTL receiver output pin. Recovered logic-level output from the differential LVDS receiver input pair 5A/5B.
10 GND power_in Ground reference pin. All device voltages referenced to this net.
11 5B input Inverting LVDS receiver input pin for channel 5. Paired with 5A as a differential LVDS input; includes internal 110-Ω line termination between 5A and 5B.
12 5A input Noninverting LVDS receiver input pin for channel 5. Paired with 5B as a differential LVDS input; includes internal 110-Ω line termination between 5A and 5B.
13 4Z output Inverting LVDS driver output pin for channel 4. Paired with 4Y as the differential LVDS output driven by input 4D.
14 4Y output Noninverting LVDS driver output pin for channel 4. Paired with 4Z as the differential LVDS output driven by input 4D.
15 3Z output Inverting LVDS driver output pin for channel 3. Paired with 3Y as the differential LVDS output driven by input 3D.
16 3Y output Noninverting LVDS driver output pin for channel 3. Paired with 3Z as the differential LVDS output driven by input 3D.
17 2Z output Inverting LVDS driver output pin for channel 2. Paired with 2Y as the differential LVDS output driven by input 2D.
18 2Y output Noninverting LVDS driver output pin for channel 2. Paired with 2Z as the differential LVDS output driven by input 2D.
19 1Z output Inverting LVDS driver output pin for channel 1. Paired with 1Y as the differential LVDS output driven by input 1D.
20 1Y output Noninverting LVDS driver output pin for channel 1. Paired with 1Z as the differential LVDS output driven by input 1D.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Interface
Pins 20

Ordering variants

Same part, different packaging or reel option.

  • SN65LVDT41PWR

CAD (KiCad official)

  • Symbol: SN65LVDT41PWR
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (36 pp, sha256 03c706fa7aacda22, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF