SN65LVDS2DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VCC	power_in	Supply voltage. Recommended operating range 2.4 V to 3.6 V (nominal 3.3 V). Bypass locally with a low-ESR ceramic capacitor.
2	GND	power_in	Device ground reference. All voltages other than differential bus voltages are referenced to this pin.
3	A	input	Non-inverting LVDS differential receiver input. Paired with B to form the differential input; differential input threshold is less than 100 mV. Receiver is open-circuit fail-safe.
4	B	input	Inverting LVDS differential receiver input. Paired with A to form the differential input. On the SN65LVDT2 variant an internal 110 Ω line termination is placed between A and B; SN65LVDS2 has no internal termination.
5	R	output	LVTTL/LVCMOS single-ended receiver output. Follows the state of the A-B differential input. Output enters high-impedance when VCC is below 1.5 V.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOT-23-5
Category	Interface
Pins	5

Ordering variants

Same part, different packaging or reel option.

SN65LVDS2DBVR
SN65LVDS2DBVRDBVT
SN65LVDS2DBVRD
SN65LVDS2DBVRDR

CAD (KiCad official)

Symbol: SN65LVDS2DBVR
Footprint: Package_TO_SOT_SMD:SOT-23-5
3D model: SOT-23-5 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (44 pp, sha256 2830b1f2b732d16f, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF