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SIT65HVD75DR

SIT · RS-485 / RS-422 ICs · SOP-8

SIT65HVD75DR from SIT, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RO output Receiver Output. When /RE is low: RO = high if (A − B) ≥ −10 mV, RO = low if (A − B) ≤ −200 mV. High-impedance when /RE is high.
2 /RE input Receiver Output Enable (active-low). Drive /RE low to enable RO; RO is high impedance when /RE is high. Driving /RE high with DE low enters low-power shutdown mode.
3 DE input Driver Output Enable (active-high). Drive DE high to enable A/B driver outputs; outputs are high impedance when DE is low. /RE high with DE low enters low-power shutdown mode.
4 DI input Driver Input. With DE high, a low on DI forces the non-inverting output (A) low and inverting output (B) high; a high on DI forces A high and B low. VIH ≥ 2.0 V, VIL ≤ 0.8 V.
5 GND power_in Ground reference for all voltages. Exposed metal pad on the back of DFN3×3-8 and MSOP/VSSOP-8 packages is recommended to be connected to GND.
6 A bidirectional Non-inverting Receiver Input and non-inverting Driver Output on the RS-485/RS-422 bus. Tolerates −15V to +15V bus fault, ±15 kV HBM ESD. Receiver input resistance ≥ 12 kΩ.
7 B bidirectional Inverting Receiver Input and Inverting Driver Output on the RS-485/RS-422 bus. Tolerates −15V to +15V bus fault, ±15 kV HBM ESD. Receiver input resistance ≥ 12 kΩ.
8 VCC power_in Positive supply. 3.0 V to 5.5 V operating range; +7 V absolute maximum. Decouple to GND with a local bypass capacitor.

Key specifications

Parameter Value
Manufacturer SIT
Package SOP-8
Category Interface
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • SIT65HVD75DR
  • SIT65HVD75DRC

CAD (KiCad official)

  • Symbol: SIT65HVD75DR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
sit65hvd75dr.step 122 KB You want the bare part, or you mark your own boards.
sit65hvd75dr-etched.step 2.2 MB You want the part with SIT65HVD75DR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 559 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SIT datasheet (21 pp, sha256 35221d50c73eaa44, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF