Symbol & Footprint

Schematic Symbol

Open full view ↗

PCB Footprint

Open full view ↗
Contents

README

markdown

SIT3490EESA

SIT · RS-485 / RS-422 ICs · SOP-8

SIT3490EESA from SIT, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Positive supply input. Operating range 3.0V to 5.5V (absolute max +7V). Typical supply current ICC = 240µA (max 400µA). Bypass locally to GND.
2 RO output Receiver output (CMOS logic). RO is high when A−B ≥ +200mV and low when A−B ≤ −200mV. VOH ≥ VCC−1.5V at −4mA; VOL ≤ 0.4V at +4mA.
3 DI input Driver input (CMOS logic). A low on DI forces Y low and Z high; a high on DI forces Y high and Z low. VIH ≥ 2.0V, VIL ≤ 0.8V, input leakage ±2µA.
4 GND power_in Device ground. Reference for all voltages on the part.
5 Y output Non-inverting differential driver output to the RS-485/RS-422 bus. Differential swing VOD ≥ 1.5V into RL = 54Ω. ±15kV HBM ESD protected. Includes short-circuit and over-voltage protection.
6 Z output Inverting differential driver output to the RS-485/RS-422 bus. Complementary to Y. ±15kV HBM ESD protected; short-circuit and over-voltage protected.
7 B input Inverting differential receiver input from the RS-485/RS-422 bus. 1/8 unit-load, RIN ≈ 96kΩ. Common-mode range −7V to +12V. ±15kV HBM ESD.
8 A input Non-inverting differential receiver input from the RS-485/RS-422 bus. 1/8 unit-load, RIN ≈ 96kΩ. Common-mode range −7V to +12V. ±15kV HBM ESD.

Key specifications

Parameter Value
Manufacturer SIT
Package SOP-8
Category Interface
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • SIT3490EESA
  • SIT3490EESAEEPA
  • SIT3490EESAEEUA

CAD (KiCad official)

  • Symbol: SIT3490EESA
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
sit3490eesa.step 122 KB You want the bare part, or you mark your own boards.
sit3490eesa-etched.step 2.3 MB You want the part with SIT3490EESA already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 577 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SIT datasheet (13 pp, sha256 4e2651818bcb1ad0, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF