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Contents

README

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SIT1022QT

SIT · LIN Transceivers · SOP-14

SIT1022QT from SIT, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RXD1 output Channel 1 receiver data output (open-drain). Reports the logic state of the LIN1 bus to the microcontroller. Driven low when a wake-up event is detected.
2 SLP1_N input Channel 1 mode-enable input. High level places channel 1 into normal mode; low level places channel 1 into sleep mode and clears the wake-up request on RXD1. Internally pulled to GND (fail-safe to sleep). Absolute max -0.3 V to +7 V.
3 TXD1 input Channel 1 transmitter data input from the LIN protocol controller. Low = LIN1 bus driven to dominant, high = recessive. Internally pulled to GND (fail-safe recessive). Absolute max -0.3 V to +7 V.
4 RXD2 output Channel 2 receiver data output (open-drain). Reports the logic state of the LIN2 bus to the microcontroller. Driven low when a wake-up event is detected.
5 SLP2_N input Channel 2 mode-enable input. High level places channel 2 into normal mode; low level places channel 2 into sleep mode and clears the wake-up request on RXD2. Internally pulled to GND (fail-safe to sleep). Absolute max -0.3 V to +7 V.
6 NC unconnected No connection. Leave floating or tie to GND.
7 TXD2 input Channel 2 transmitter data input from the LIN protocol controller. Low = LIN2 bus driven to dominant, high = recessive. Internally pulled to GND (fail-safe recessive). Absolute max -0.3 V to +7 V.
8 GND power_in Ground reference for the device (0 V). All voltages are referenced to this pin.
9 LIN2 bidirectional Channel 2 LIN bus I/O (single-wire bus, up to 20 kbps). Recessive ≈ VBAT, dominant ≈ GND. Includes slope-controlled driver, EMI-optimised waveform, ±42 V bus fault tolerance and integrated 30 kΩ slave pull-up to VBAT (add external diode+resistor for master node).
10 VBAT power_in Battery supply pin. Operating range 5.5 V to 27 V (absolute max -0.3 V to +42 V). Powers the LIN transmitter and internal regulator; monitored by the power-on reset (Vth(VBATL)L ≈ 3.9-4.7 V) to gate LIN activity.
11 NC unconnected No connection. Leave floating or tie to GND.
12 NC unconnected No connection. Leave floating or tie to GND.
13 LIN1 bidirectional Channel 1 LIN bus I/O (single-wire bus, up to 20 kbps). Recessive ≈ VBAT, dominant ≈ GND. Includes slope-controlled driver, EMI-optimised waveform, ±42 V bus fault tolerance and integrated 30 kΩ slave pull-up to VBAT (add external diode+resistor for master node).
14 NC unconnected No connection. Leave floating or tie to GND.

Key specifications

Parameter Value
Manufacturer SIT
Package SOP-14
Category Interface
Pins 14

Ordering variants

Same part, different packaging or reel option.

  • SIT1022QT
  • SIT1022QTK
  • SIT1022QHG

CAD (KiCad official)

  • Symbol: SIT1022QT
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOP-14 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SIT datasheet (20 pp, sha256 ec980461f79c602f, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF