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SI53354A-D01AMR

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by Ray

SKYWORKS SILICON LABS Clock Buffers, Drivers, Distributors, QFN-40-EP(6x6). Datasheet-verified pinout, KiCad symbol/footprint/3D.

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Contents

README

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SI53354A-D01AMR

SKYWORKS SILICON LABS · Clock Buffers, Drivers, Distributors · QFN-40-EP(6x6)

SI53354A-D01AMR from SKYWORKS SILICON LABS, in a QFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD_DIG power_in Digital core supply, 1.8-3.3 V. Must be tied to the same voltage rail as VDD and VDDA.
2 CLKIN_1 input Clock input 1 (positive). Accepts differential or single-ended clocks; high-impedance and must be externally terminated. Selected when Input_SEL=0.
3 CLKIN_1b input Clock input 1 (complementary). Paired with CLKIN_1 for differential input; may be tied for single-ended use. Leave floating only if input configured as 'Unused' in ClockBuilder Pro.
4 VDD power_in Core supply, 1.8-3.3 V. Must be tied to same rail as VDDA and VDD_DIG.
5 NC unconnected No connect. Do not connect this pin to anything.
6 NC unconnected No connect. Do not connect this pin to anything.
7 CLKIN_2 input Clock input 2 (positive). Accepts differential or single-ended clocks; high-impedance and must be externally terminated. Selected when Input_SEL=1.
8 CLKIN_2b input Clock input 2 (complementary). Paired with CLKIN_2. Leave floating only if input configured as 'Unused' in ClockBuilder Pro.
9 VDDA power_in Analog core supply, 1.8-3.3 V. Must be tied to same rail as VDD and VDD_DIG.
10 Format_SEL0 input Output clock format selection input, LSB. Used with Format_SEL1 (pin 19) to pick differential/LVCMOS format per Section 3.2.
11 GND power_in Ground. Tie to system ground.
12 GND power_in Ground. Tie to system ground.
13 OUT0b output Output clock 0 (complementary). Programmable swing and common-mode; supports differential and LVCMOS formats. Leave unconnected if unused.
14 OUT0 output Output clock 0 (positive). Programmable swing and common-mode; supports differential and LVCMOS formats. Leave unconnected if unused.
15 VDDO0 power_in Output supply for OUT0 driver, 1.8-3.3 V. Sets OUT0 signal swing/format rail. Leave unconnected or tie high with driver disabled if OUT0 is unused.
16 OUT1b output Output clock 1 (complementary). Programmable swing and common-mode. Leave unconnected if unused.
17 OUT1 output Output clock 1 (positive). Programmable swing and common-mode. Leave unconnected if unused.
18 VDDO1 power_in Output supply for OUT1 driver, 1.8-3.3 V. Leave unconnected or tie high with driver disabled if OUT1 is unused.
19 Format_SEL1 input Output clock format selection input, MSB. Used with Format_SEL0 (pin 10) per Section 3.2.
20 Input_SEL input Input clock mux select. 0 = CLKIN_1/CLKIN_1b; 1 = CLKIN_2/CLKIN_2b.
21 OUT2b output Output clock 2 (complementary). Programmable swing and common-mode. Leave unconnected if unused.
22 OUT2 output Output clock 2 (positive). Programmable swing and common-mode. Leave unconnected if unused.
23 OUT3b output Output clock 3 (complementary). Programmable swing and common-mode. Leave unconnected if unused.
24 OUT3 output Output clock 3 (positive). Programmable swing and common-mode. Leave unconnected if unused.
25 VDDO2 power_in Shared output supply for OUT2 and OUT3 drivers, 1.8-3.3 V. Leave unconnected or tie high with drivers disabled if both outputs are unused.
26 NC unconnected No connect. Do not connect this pin to anything.
27 NC unconnected No connect. Do not connect this pin to anything.
28 NC unconnected No connect. Do not connect this pin to anything.
29 NC unconnected No connect. Do not connect this pin to anything.
30 NC unconnected No connect. Do not connect this pin to anything.
31 OEb_OUT0 input Active-low output enable for OUT0. 0 = output enabled; 1 = output disabled.
32 OEb_OUT1 input Active-low output enable for OUT1. 0 = output enabled; 1 = output disabled.
33 NC unconnected No connect. Do not connect this pin to anything.
34 NC unconnected No connect. Do not connect this pin to anything.
35 NC unconnected No connect. Do not connect this pin to anything.
36 OEb_OUT2 input Active-low output enable for OUT2. 0 = output enabled; 1 = output disabled.
37 OEb_OUT3 input Active-low output enable for OUT3. 0 = output enabled; 1 = output disabled.
38 NC unconnected No connect. Do not connect this pin to anything.
39 NC unconnected No connect. Do not connect this pin to anything.
40 NC unconnected No connect. Do not connect this pin to anything.
41 GND power_in Center exposed pad. Electrical and thermal ground; must be soldered to the board ground plane for proper operation.

Key specifications

Parameter Value
Manufacturer SKYWORKS SILICON LABS
Package QFN-40-EP(6x6)
Category Clock/Timing
Pins 41

Ordering variants

Same part, different packaging or reel option.

  • SI53354A-D01AMR
  • Si53354A-D01AMR
  • Si53354BD12750-AM
  • Si53354BD-xxxxx-AM
  • Si53350A-D01AM
  • Si53350BD12748-AM
  • Si53350BD-xxxxx-AM
  • Si53358A-D01AM
  • Si53358BD12749-AM
  • Si53358BD-xxxxx-AM
  • Si53352A-D01AM
  • Si53352BD12751-AM
  • Si53352BD-xxxxx-AM

CAD (KiCad official)

  • Symbol: SI53354A-D01AMR
  • Footprint: Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm
  • 3D model: QFN-40-EP(6x6) (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SKYWORKS SILICON LABS datasheet (63 pp, sha256 c46ddd6abc7831e4, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF